Setting LCDCTRL_HSYNC_POL and LCDCTRL_VSYNC_POL will make the respective sync signal active high. The driver does this in inverse. Fix it.
Signed-off-by: Tomi Valkeinen <[email protected]> --- drivers/gpu/drm/bridge/tc358762.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c index 797866265b41..3a2e6a97feb8 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -190,10 +190,10 @@ static int tc358762_init(struct tc358762 *ctx) lcdctrl |= LCDCTRL_DCLK_POL; - if (ctx->mode.flags & DRM_MODE_FLAG_NHSYNC) + if (ctx->mode.flags & DRM_MODE_FLAG_PHSYNC) lcdctrl |= LCDCTRL_HSYNC_POL; - if (ctx->mode.flags & DRM_MODE_FLAG_NVSYNC) + if (ctx->mode.flags & DRM_MODE_FLAG_PVSYNC) lcdctrl |= LCDCTRL_VSYNC_POL; tc358762_write(ctx, LCDCTRL, lcdctrl); -- 2.43.0
