> On 12 Sep 2026, at 07:39, Onur Özkan <[email protected]> wrote:
> 
> Add support for scheduling GPU resets on a dedicated workqueue. Track
> the reset state to avoid queueing another reset while one is already
> pending or in progress.
> 
> Use an SRCU based gate with mutex-protected reader admission to block
> hardware accesses while reset work runs and wait for current users
> before resetting.
> 
> Stop new reset requests during teardown and drain any queued or running
> reset work before releasing the device resources.
> 
> This is the initial reset infrastructure only. It is not wired to a reset
> source yet as those will follow in separate work.
> 
> Based on 'commit 53441a9cae3c ("drm/tyr: program CSF global interface")'
> from tyr-for-upstream with the following patch series on the ML:
>  - rust: add SRCU abstraction [1]
>  - rust: workqueue: add cancel_sync support [2]
> 
> TODOs:
>  - On reset failure, we don't do anything for now. We should unplug
>    the GPU.
>  - In schedule(), similar to panthor_device_schedule_reset(), we should
>    have a PM check but similar to the note above, we don't have the
>    infrastructure for that yet.
> 
> Changes since v6:
>  - Acquire the hardware gate once per address-space operation and pass
>    the guarded iomem reference to helpers to avoid deadlocks.
>  - Clone the gate Arc before acquiring a guard so mutating address-space
>    helpers can retain their &mut self receivers as suggested by Daniel.
> 
> Link: https://lore.kernel.org/all/[email protected] 
> [1]
> Link: https://lore.kernel.org/all/[email protected] [2]
> Link: https://lore.kernel.org/all/[email protected]
> Link: https://gitlab.freedesktop.org/panfrost/linux/-/issues/28
> Signed-off-by: Onur Özkan <[email protected]>
> ---
> Onur Özkan (3):
>      drm/tyr: clear stale IRQ state before soft reset
>      drm/tyr: add GPU reset infrastructure
>      drm/tyr: put iomem behind the hardware gate
> 
> drivers/gpu/drm/tyr/driver.rs            |  65 ++++-----
> drivers/gpu/drm/tyr/fw.rs                |  16 +-
> drivers/gpu/drm/tyr/mmu.rs               |   9 +-
> drivers/gpu/drm/tyr/mmu/address_space.rs |  90 +++++++-----
> drivers/gpu/drm/tyr/reset.rs             | 242 +++++++++++++++++++++++++++++++
> drivers/gpu/drm/tyr/reset/hw_gate.rs     | 106 ++++++++++++++
> drivers/gpu/drm/tyr/tyr.rs               |   1 +
> 7 files changed, 436 insertions(+), 93 deletions(-)
> ---
> base-commit: 53441a9cae3c4be552fa8aefa6e61b0f1bceb8a5
> change-id: 20260813-tyr-reset-impl-93e951f996b4
> prerequisite-message-id: <[email protected]>
> prerequisite-patch-id: 4275f7d6e3cf96d61221d47f2398ebfb896db0c7
> prerequisite-patch-id: f5e24f7b3717f2ab0445b5395c7f12b554861d78
> prerequisite-patch-id: 0bf6ae4abcef7090d0e48921d6ec627a59dc6a7a
> prerequisite-patch-id: 8dc24064e858240a6bb5411a261a987a7eae3fad
> prerequisite-patch-id: eefbd4a72ed6da0083e20811882738cc3b05604f
> prerequisite-patch-id: 7502236d334b13c547a8b47f0be9bf7171b5ca6b
> prerequisite-message-id: <[email protected]>
> prerequisite-patch-id: 9e1efee190d212ba1b01cd0acb5a4357e0b4da42
> prerequisite-patch-id: 26aba035f4d1e212fa6ea7078095febefff5c5ba
> prerequisite-patch-id: ffa25d5aadec4c04589af2bdd59a9c022f0fc9b0
> prerequisite-patch-id: c2e05a4ac9d665d331952b291a622df6be673e41
> prerequisite-patch-id: c14a4bd8a68b045356d61f7fa94690bd037ad08b
> 
> --  
> 


Alice, if you are ok with this series, feel free to merge. At least from my 
side it looks ok.

— Daniel

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