intel_vrr_possible() is crtc_state->vrr.flipline != 0. intel_vrr_compute_fixed_rr_timings() programs flipline even when VRR is off, so commit 6a1712052859 sends an Adaptive-Sync SDP with DP_AS_SDP_AVT_FIXED_VTOTAL on a constant refresh.
On a Panther Lake eDP that only advertises VRR in EDID, that packet vertically streaks the first modeset (boot and s2idle resume) when Adaptive Sync is Never or Automatic. Send the SDP only while VRR or CMRR is actually enabled. Keep the Panel Replay aux-less-ALPM early return from the same commit. The previous patch already reserves the AS SDP guardband when assume_all_enabled is set, so this does not move crtc_vblank_start when userspace toggles Adaptive Sync. vrr.in_range is not a substitute here: this panel's EDID range is 30-120 Hz, so 60 Hz and 120 Hz stay in_range with VRR off and still get AVT_FIXED_VTOTAL. This does not fix Adaptive Sync = Always. That path already has vrr.enable set and is handled by the next patch. Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9252 Fixes: 6a1712052859 ("drm/i915/dp: Enable AS SDP whenever VRR is possible or PR !async") Cc: [email protected] # 7.2+ Signed-off-by: Xizhe Tang <[email protected]> Tested-by: Xizhe Tang <[email protected]> # 7.2.8 xe.ko and drm-tip, PTL eDP, Adaptive Sync=Never/Automatic --- Changes in v3: - Guardband reservation moved to 1/3 so this no longer changes crtc_vblank_start when vrr.enable toggles (Ville). - Commit message rewritten around why, not the code path (Jani). - Record that vrr.in_range still sends on this 30-120 Hz panel. - Use vrr.cmrr.enable (nested under vrr on drm-tip). v2 used the older sibling cmrr.enable. drivers/gpu/drm/i915/display/intel_dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 7bfe796..95efc99 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3113,7 +3113,8 @@ static bool intel_dp_needs_as_sdp(struct intel_dp *intel_dp, !intel_psr_pr_async_video_timing_supported(intel_dp)) return true; - return intel_vrr_possible(crtc_state); + /* intel_vrr_possible() is also true for fixed RR. */ + return crtc_state->vrr.enable || crtc_state->vrr.cmrr.enable; } static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, -- 2.55.0
