Hi, The Radxa Dragon Q8B is a single-board computer based on the Qualcomm Snapdragon 8cx Gen 3 (SC8280XP) platform.
The board provides UFS and microSD storage, two M.2 M-key slots, an M.2 E-key slot, a QPS615/TC9563 PCIe switch, USB Type-C ports with DisplayPort alternate mode, USB Type-A ports, HDMI 2.1 output, headset audio and a 40-pin expansion header. This series adds the initial device tree support for the board. It describes the regulators, storage, PCIe topology, USB and display outputs, audio, remote processors, thermal sensors, RTC, EEPROM and expansion header. Build targets for both the regular and EL2 device trees are included. The TC9563 power-control driver powers off external downstream ports whose device tree nodes have status = "disabled". On the Dragon Q8B, config-space reads to these powered-off port functions raise an Arm SError instead of returning an all-ones PCI error response, preventing the board from completing boot. The PCI OF change to skip config-space reads for unavailable DT-described bridge functions has been split out into a separate two-patch series for the PCI tree. Disabled endpoint functions remain discoverable so PCI fixups can still be applied, while driver binding continues to be suppressed later. The onboard HDMI output is provided by a Chrontel CH7218A DisplayPort 1.4 to HDMI 2.1 protocol converter. The device boots its firmware from on-chip flash and requires no host-side configuration, so the series documents it and adds it to the simple bridge driver. The series also documents the board compatible. The SC8280XP TLMM binding change allowing gpio-line-names has already been applied and is no longer included in this series. The PCI change is required before applying the board DTS patch; otherwise the disabled TC9563 downstream ports cause a boot-time SError. The display binding and driver patches can otherwise be applied independently through the DRM tree. Signed-off-by: Xilin Wu <[email protected]> --- Changes in v2: - Describe the TC9563 embedded GPIO controller and use its GPIOs 2 and 3 for the external downstream port PERST# reset lines. - Drop "PCI: of: Avoid config reads for disabled bridge nodes"; split it into a separate two-patch PCI series, including the kernel-doc fix. - Drop "dt-bindings: pinctrl: qcom,sc8280xp-tlmm: allow gpio-line-names" because it has already been applied. - Link to v1: https://patch.msgid.link/[email protected] To: Andrzej Hajda <[email protected]> To: Neil Armstrong <[email protected]> To: Robert Foss <[email protected]> To: Laurent Pinchart <[email protected]> To: Jonas Karlman <[email protected]> To: Jernej Skrabec <[email protected]> To: Luca Ceresoli <[email protected]> To: David Airlie <[email protected]> To: Simona Vetter <[email protected]> To: Maarten Lankhorst <[email protected]> To: Maxime Ripard <[email protected]> To: Thomas Zimmermann <[email protected]> To: Rob Herring <[email protected]> To: Krzysztof Kozlowski <[email protected]> To: Conor Dooley <[email protected]> To: Bjorn Andersson <[email protected]> To: Konrad Dybcio <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] --- Xilin Wu (4): dt-bindings: display: bridge: simple: document Chrontel CH7218A drm/bridge: simple: add Chrontel CH7218A dt-bindings: arm: qcom: document Radxa Dragon Q8B arm64: dts: qcom: sc8280xp: add Radxa Dragon Q8B Documentation/devicetree/bindings/arm/qcom.yaml | 1 + .../bindings/display/bridge/simple-bridge.yaml | 1 + arch/arm64/boot/dts/qcom/Makefile | 2 + .../boot/dts/qcom/sc8280xp-radxa-dragon-q8b.dts | 2102 ++++++++++++++++++++ drivers/gpu/drm/bridge/simple-bridge.c | 5 + 5 files changed, 2111 insertions(+) --- base-commit: e30626823a406725ce29bc75cb8ec467d3e1e326 change-id: 20260901-q8b-dts-a3afc5f9b8b2 prerequisite-change-id: 20260507-sc8280xp-qup-pinctrl-5ab8af9be35f:v2 prerequisite-patch-id: 1060ddda6f3ff07b36691a0dd7d783a5be2cc993 Best regards, -- Xilin Wu <[email protected]>
