FRL is a high-bandwidth transmission mode required for modes that exceed the TMDS bandwidth limit.
The series covers the core enabling: - SCDC helper additions for FRL link training - FRL link training state machine (LTS:2, LTS:3, LTS:P) - DDI enable/disable sequence updates for FRL mode - DFM (Data Flow Metering) computation and register programming - PHY (CX0/LT PHY) support for FRL rates - Mode validation and clock computation for FRL This is a work in progress. The primary goal at this stage is to get the overall design reviewed and the foundational patches landed before building on top. Lightly tested on PTL. Modes like 4K@120 are working. Higher resolution modes (e.g. 8K) require DSC which is not yet covered in this series, that work is ongoing. Testing on other MTL+ platforms is also ongoing. Known gaps: - DSC over FRL not yet supported - Testing limited to MTL, PTL so far Feedback on the design and approach is welcome. Rev 2: - Addressed review comments from Jani and Suraj on VBT parsing. - Added pipe joiner support for HDMI. - Added audio pruning for HDMI FRL mode. - Tweaked the vswing presets and removed test-only presets. - Fixed potential integer overflows in FRL DFM calculations. - Tested on MTL, PTL, NVL with AORUS FO32U2P HDMI 2.1 panel. Note: DSC support is WIP. Working patches are available in my public tree: https://github.com/aknautiyal/tip/tree/hdmi21_dev (based on drm-tip, may be rebased) Tested working for most modes. Ankit Nautiyal (38): drm/i915/hdmi: Add new data members for FRL configuration drm/i915/hdmi: Add FRL link rate cap drm/drm_scdc_helper: Add SCDC helper funcs for FRL drm/i915/display: Add registers for HDMI FRL configuration drm/i915/display: Add new members in crtc_state for FRL configuration drm/i915/intel_cx0_phy_regs: Add HDMI FRL SHIFT EN bit in PORT_BUF_CTL_1 drm/i915/ddi: Update Transcoder/DDI registers with the frl bits drm/i915/hdmi: Enable Scrambling only for TMDS mode drm/i915/ddi: Simplify intel_ddi_enable() drm/i915/ddi: Factor out common transcoder/vblank enable sequence drm/i915/ddi: Update HDMI modeset sequence for MTL+ drm/i915/hdmi: Add function to prepare registers for FRL mode drm/i915/hdmi: Add functions for FRL training state machine drm/i915/intel_hdmi: Add helper to disable FRL drm/i915/hdmi: Reduce FRL rate cap on rate change during training drm/i915/hdmi: Add provision for FRL mode while computing output format drm/i915/cx0: Add helper to check if the FRL rate is valid drm/i915/lt_phy: Add helper to check if the FRL rate is valid drm/i915/hdmi_frl_dfm: Add support for DFM calculation with DSC drm/i915/hdmi: Add helper to write FRL CFG register drm/i915/hdmi_frl_dfm: Add helpers to read/write FRL DFM registers drm/i915/hdmi: Validate FRL modes in mode_valid using the FRL DFM drm/i915/hdmi: Add FRL clock computation based on DFM drm/i915/hdmi: Add support for sending uevent to user for FRL training failure drm/i915/ddi: Wire FRL into the HDMI DDI enable/disable path drm/i915/ltphy: Fix HDMI FRL per-lane TX mapping drm/i915/hdmi: Add read out for FRL state drm/i915/hdmi: Use the real pixel clock as crtc_clock for FRL drm/i915/display: Add FRL members to the state checker drm/i915/hdmi: Compute output format for HDMI FRL mode drm/i915/hdmi: Add a helper to check non DSC audio support for HDMI FRL drm/i915/audio: Add the mode pruning logic for HDMI FRL drm/i915/joiner: Prepare to move joiner helpers to a new file drm/i915/joiner: Move joiner candidate helpers to intel_joiner.c drm/i915/joiner: Move joiner pipe mask helper to intel_joiner.c drm/i915/hdmi: Iterate through joiner candidates in compute_config path drm/i915/hdmi: Iterate through joiner candidates in mode_valid path drm/i915/hdmi: Allow Pipe joiner for HDMI Suraj Kandpal (7): drm/i915/hdmi: Introduce intel_hdmi_frl_level() for per-lane TxFFE drm/i915/hdmi: Drive per-lane TxFFE during FRL link training drm/i915/ltphy: Add PLL tables for HDMI FRL drm/i915/ltphy: Add safegaurd when calculation HDMI FRL state drm/i915/ltphy: Calculate port clock for HDMI FRL drm/i915/ltphy: Verify HDMI FRL tables drm/i915/ddi_buf: Add Vswing table for HDMI FRL Vandita Kulkarni (11): drm/i915/hdmi: Parse FRL max link rate from VBT drm/i915/hdmi_frl_dfm_regs: Define DFM registers drm/i915/hdmi_frl_dfm: Define frl_dfm structure drm/i915/hdmi_frl_dfm: Add non dsc frl capacity computation helpers drm/i915/hdmi: Rename port clock limit to specify tmds clock drm/i915/hdmi: Rename port clock valid to specify tmds clock drm/i915/hdmi: Rename mode clock valid to specify tmds clock drm/i915/hdmi: Add FRL port clock valid drm/i915/hdmi: Compute FRL Link M/N drm/i915/hdmi_frl_dfm: Write and read back FRL Link M/N drm/i915/hdmi: Enable FRL based mode clock valid drivers/gpu/drm/display/drm_scdc_helper.c | 109 ++ drivers/gpu/drm/i915/Makefile | 2 + drivers/gpu/drm/i915/display/intel_audio.c | 14 +- drivers/gpu/drm/i915/display/intel_bios.c | 39 + drivers/gpu/drm/i915/display/intel_bios.h | 1 + drivers/gpu/drm/i915/display/intel_cx0_phy.c | 23 + drivers/gpu/drm/i915/display/intel_cx0_phy.h | 1 + .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 159 ++- .../drm/i915/display/intel_ddi_buf_trans.c | 17 + drivers/gpu/drm/i915/display/intel_display.c | 55 +- .../drm/i915/display/intel_display_debugfs.c | 6 +- .../gpu/drm/i915/display/intel_display_regs.h | 27 + .../drm/i915/display/intel_display_types.h | 38 + drivers/gpu/drm/i915/display/intel_dp.c | 54 +- drivers/gpu/drm/i915/display/intel_dp.h | 11 - drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +- drivers/gpu/drm/i915/display/intel_dpll.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 1051 ++++++++++++++++- drivers/gpu/drm/i915/display/intel_hdmi.h | 16 +- .../gpu/drm/i915/display/intel_hdmi_frl_dfm.c | 787 ++++++++++++ .../gpu/drm/i915/display/intel_hdmi_frl_dfm.h | 123 ++ .../i915/display/intel_hdmi_frl_dfm_regs.h | 36 + drivers/gpu/drm/i915/display/intel_joiner.c | 108 ++ drivers/gpu/drm/i915/display/intel_joiner.h | 27 + drivers/gpu/drm/i915/display/intel_lt_phy.c | 348 +++++- drivers/gpu/drm/i915/display/intel_lt_phy.h | 1 + .../drm/i915/display/intel_modeset_verify.c | 18 + drivers/gpu/drm/i915/display/intel_vbt_defs.h | 7 + drivers/gpu/drm/xe/Makefile | 2 + include/drm/display/drm_scdc.h | 3 + include/drm/display/drm_scdc_helper.h | 23 + 32 files changed, 2886 insertions(+), 228 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_hdmi_frl_dfm.c create mode 100644 drivers/gpu/drm/i915/display/intel_hdmi_frl_dfm.h create mode 100644 drivers/gpu/drm/i915/display/intel_hdmi_frl_dfm_regs.h create mode 100644 drivers/gpu/drm/i915/display/intel_joiner.c create mode 100644 drivers/gpu/drm/i915/display/intel_joiner.h -- 2.50.1
