Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] drm/i915/ltphy: Valid TMDS modes with FRL-like clocks get misidentified as FRL --
commit 24fcf65234b436b2c1d8a2379615e06c2dcf0888 Author: Suraj Kandpal <[email protected]> drm/i915/ltphy: Add safegaurd when calculation HDMI FRL state This commit adds a safeguard in intel_lt_phy_pll_calc_state() to skip the HDMI TMDS dynamic PLL calculation when an HDMI FRL mode is in use. It determines this by checking if the port clock matches an FRL rate. > drm/i915/ltphy: Add safegaurd when calculation HDMI FRL state This isn't a bug, but there is a typo (safegaurd) in the subject line. > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c > b/drivers/gpu/drm/i915/display/intel_lt_phy.c > index 61bad87eefec2..0e2ebd550bc5e 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c > @@ -2042,7 +2042,8 @@ intel_lt_phy_pll_calc_state(struct intel_crtc_state > *crtc_state, > } > } > > - if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { > + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) && > + !intel_hdmi_is_frl(crtc_state->port_clock)) { [Severity: Medium] Does this logic mistakenly prevent the TMDS dynamic calculation for 300MHz and 600MHz TMDS modes? Looking at intel_hdmi_is_frl(), it only checks if the numeric clock rate matches one of the FRL rates: drivers/gpu/drm/i915/display/intel_hdmi.c:intel_hdmi_is_frl() { static const u32 rates[] = { 300000, 600000, 800000, 1000000, 1200000 }; ... for (i = 0; i < ARRAY_SIZE(rates); i++) if (intel_dpll_clock_matches(clock, rates[i])) return true; return false; } Since 300MHz and 600MHz can also be valid TMDS pixel clocks, a TMDS mode with exactly these clock rates would cause intel_hdmi_is_frl() to return true. This would block the fallback intel_lt_phy_calculate_hdmi_state() calculation for those valid TMDS modes. Should this check verify the protocol state instead, for example by checking if crtc_state->frl.enable is true? > hw_state->ltpll.lane_count = crtc_state->lane_count; > return intel_lt_phy_calculate_hdmi_state(&hw_state->ltpll, > > crtc_state->port_clock); -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=20
