Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: - [High] dt: qcom: swapped regulators for usb_1_qmpphy (vdda-phy vs vdda-pll) - [Medium] dt: qcom: mismatched GPIO for touchpad interrupt and pinctrl --
commit 6783a272db1b782f7b019b76b1616193bd1640d7 Author: Jasper Korten <[email protected]> arm64: dts: qcom: Add Samsung Galaxy Book2 Go Adds initial device tree support for the Samsung Galaxy Book2 Go laptop based on the Snapdragon 7c+ Gen 3 (SC7280) SoC. This includes support for the display, input devices, storage, networking, and standard peripherals. > diff --git a/arch/arm64/boot/dts/qcom/sc7280-samsung-galaxy-book2-go.dts > b/arch/arm64/boot/dts/qcom/sc7280-samsung-galaxy-book2-go.dts > new file mode 100644 > index 0000000000000..fe1a1b01f67e8 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sc7280-samsung-galaxy-book2-go.dts [ ... ] > +&i2c0 { > + clock-frequency = <400000>; > + > + status = "okay"; > + > + /* SSTP0001 */ > + touchpad@40 { > + compatible = "hid-over-i2c"; > + reg = <0x40>; > + hid-descr-addr = <0x0e>; > + > + interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>; > + > + vdd-supply = <&vreg_l7c_3p0>; > + vddl-supply = <&vreg_l18b_1p8>; > + > + post-power-on-delay-ms = <2>; > + > + pinctrl-0 = <&hid_touchpad_default>; > + pinctrl-names = "default"; > + > + wakeup-source; > + }; > +}; [ ... ] > +&tlmm { [ ... ] > + hall_int_default: hall-int-state { > + pins = "gpio35"; > + function = "gpio"; > + bias-disable; > + }; > + > + hid_touchpad_default: hid-touchpad-default-state { > + pins = "gpio61"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-up; > + }; [Severity: Medium] Will this misconfigure the touchpad interrupt pin? The touchpad@40 node defines its interrupt on GPIO 51 but specifies its pinctrl state as hid_touchpad_default, which configures GPIO 61 instead. Because the actual interrupt line is GPIO 51, it will not receive the required pull-up, and an unrelated GPIO will be configured. Can this lead to a non-functional touchpad or spurious interrupts during hardware initialization? [ ... ] > +&usb_1_qmpphy { > + vdda-phy-supply = <&vreg_l6b_1p2>; > + vdda-pll-supply = <&vreg_l1b_0p8>; > + > + status = "okay"; > +}; [Severity: High] Are the regulators swapped for the USB QMP PHY? The usb_1_qmpphy node binds vdda-phy-supply to vreg_l6b_1p2 (1.2V) and vdda-pll-supply to vreg_l1b_0p8 (0.8V). Typically, the QMP PHY core domain expects around 0.88V, and the PLL domain expects 1.2V. Will this overvolt the core domain to 1.2V and undervolt the PLL domain to 0.8V, breaking USB SuperSpeed functionality and potentially posing a risk of hardware damage when the regulators are enabled on boot? > + > +&venus { > + firmware-name = "qcom/sc7280/Samsung/galaxy-book2-go/qcvss7280.mbn"; > + > + status = "okay"; > +}; -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=3
