Hi, > Hi, > > On Sun, Oct 11, 2026 at 9:44=E2=80=AFAM Jun Yan <[email protected]> = > wrote: > > > > Add the BOE NV140FHD-N43 14.0" 1920x1080 eDP panel found in the > > Sunniwell Z96A. > > > > raw EDID: > > > > 00 ff ff ff ff ff ff 00 09 e5 f4 03 00 00 00 00 > > 13 1c 01 04 a5 1f 11 78 02 3f 62 94 5e 56 94 28 > > 21 4f 58 00 00 00 01 01 01 01 01 01 01 01 01 01 > > 01 01 01 01 01 01 c8 36 80 cc 70 38 14 40 30 20 > > 36 00 35 ae 10 00 00 1a 86 24 80 cc 70 38 14 40 > > 64 64 44 05 35 ad 10 00 00 1a 00 00 00 fe 00 53 > > 54 41 52 52 59 0a 20 20 20 20 20 20 00 00 00 fe > > 00 4e 56 31 34 30 46 48 44 2d 4e 34 33 0a 00 97 > > > > Signed-off-by: Jun Yan <[email protected]> > > --- > > drivers/gpu/drm/panel/panel-edp.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pa= > nel-edp.c > > index ac815729aa83..ba981581f3b4 100644 > > --- a/drivers/gpu/drm/panel/panel-edp.c > > +++ b/drivers/gpu/drm/panel/panel-edp.c > > @@ -1972,6 +1972,7 @@ static const struct edp_panel_entry edp_panels[] = > =3D { > > EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120X= > AN01.0"), > > EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140X= > TN07.7"), > > > > + EDP_PANEL_ENTRY('B', 'O', 'E', 0x03f4, &delay_200_500_e50, "NV140= > FHD-N43"), > > EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unkn= > own"), > > EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116= > WHM-N11"), > > EDP_PANEL_ENTRY('B', 'O', 'E', 0x0609, &delay_200_500_e50_po2e200= > , "NT116WHM-N21 V4.1"), > > Things look pretty reasonable, but before landing I'd love a little > more background about this panel and where your timings come from. Do > you actually have a datasheet here, or are the timings a guess based > on nearby panels? This panel is also curious in a few other ways: >
Thanks for your review. Regarding the NV140FHD-N43 panel: I could not find its dedicated datasheet. Instead, I referenced the similar NV140FHM-N43 panel [0], which shares the same resolution but is 6-bit. As I understand it, per section 8.0 POWER SEQUENCE: - hpd_absent maps to T3 (200ms) - unprepare maps to T10 (500ms) - enable maps to T17 (20ms). [0] https://raw.githubusercontent.com/yjun123/e-waste/master/sunniwell-z96a/datasheet/NV140FHM-N43_GZ.pdf Since delay_200_500_e20 is not defined, I'd avoid adding a new delay entry. Reusing delay_200_500_e50 is acceptable and works fine on hardware. > 1. ID (0x03f4) is much lower than other panels. > > 2. The EDID contains the string "STARRY", which is weird for a BOE panel. > These two points are indeed strange and I have no good explanation for them. That said, I found a third‑party EDID for this same panel [1]. It contains identical information to the EDID I extracted from the panel, so this is not an isolated case. [1] https://github.com/linuxhw/EDID/blob/9c0c1bffc9c0f1cb2044115149a5ecb1652803f8/Digital/BOE/BOE03F4/C26FE7F0F22E > None of that is necessarily blocking, but I wanted to get a little > more info. Thanks! > > -Doug
