Hi Konrad,
On 10/13/2026 4:00 PM, Konrad Dybcio wrote:
On 10/6/26 11:50 AM, Gopikrishna Garmidi wrote:
Add support for the Microsoft Surface Laptop 13.8" 8th Edition, which is
built on the Mahua SoC. Most of the board follows the Qualcomm reference
design. The keyboard, fan and platform profile sit behind the Surface
Aggregator Module on uart22, same as on the Surface Laptop 7.
[...]
+&mdss_dp3_out {
+ data-lanes = <0 1 2 3>;
+ /* HBR2 channel equalization fails, limit the link to HBR */
+ link-frequencies = /bits/ 64 <1620000000 2700000000>;
Oops, that's no good - is there a chance this helps?
https://lore.kernel.org/linux-arm-msm/[email protected]/
Thanks for the pointer. It helps, but doesn't get HBR2 working.
The panel (SHP LQ138P1JX61) supports up to HBR2. With all rates allowed,
clock recovery passes every time, and channel EQ goes like this:
without patch with patch
HBR2 x4 fail fail
HBR2 x2 fail fail
HBR2 x1 fail pass
Without the patch the sink asks for swing 2 / pre-emphasis 2 on all
lanes and never locks. With it, lane 0 settles at pre-emphasis 1, but
lanes 1-3 still sit at 2 and fail. A single lane doesn't have enough
bandwidth for the native mode, so it seems the PHY still needs more
tuning at HBR2.
Limited to HBR, 4 lanes train first time, so I'd like to keep that in
v2 for now. Happy to test anything else you have in mind.
[...]
+&usb_0 {
+ dr_mode = "host";
OTG should work just fine on both ports
Will drop dr_mode in v2.
Thanks,
Gopikrishna
