From: Ishu Brar <[email protected]> Add the catalog entry for the Adreno 620 (chip id 0x06020000) found in the Snapdragon 765/765G/768G (SM7250). It is an A650 derivative and uses its SQE and GMU firmware and protect table, together with the A620 zap shader.
The speed-bin fuse values map to the OPP bins as in the downstream "lito" devicetree: fuse 0 is the default bin and fuse 132 and 115 are the two alternate ones. Tested on a OnePlus Nord (SM7250) with Vulkan. Signed-off-by: Ishu Brar <[email protected]> --- drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c index 4ef2bd6e7..45480dbf4 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c @@ -943,6 +943,31 @@ static const struct adreno_info a6xx_gpus[] = { { 169, 2 }, { 180, 1 }, ), + }, { + .chip_ids = ADRENO_CHIP_IDS(0x06020000), + .family = ADRENO_6XX_GEN3, + .fw = { + [ADRENO_FW_SQE] = "a650_sqe.fw", + [ADRENO_FW_GMU] = "a650_gmu.bin", + }, + .gmem = SZ_512K, + .inactive_period = DRM_MSM_INACTIVE_PERIOD, + .quirks = ADRENO_QUIRK_HAS_CACHED_COHERENT | + ADRENO_QUIRK_HAS_HW_APRIV, + .funcs = &a6xx_gpu_funcs, + .zapfw = "a620_zap.mbn", + .a6xx = &(const struct a6xx_info) { + .hwcg = a620_hwcg, + .protect = &a650_protect, + .gbif_cx = a640_gbif, + .gmu_cgc_mode = 0x00020200, + .prim_fifo_threshold = 0x00010000, + }, + .speedbins = ADRENO_SPEEDBINS( + { 0, 0 }, + { 132, 1 }, + { 115, 3 }, + ), }, { .chip_ids = ADRENO_CHIP_IDS(0x06020100), .family = ADRENO_6XX_GEN3, -- 2.56.0
