The dispc_vp_mode_valid() function checks whether a mode can be handled by the display controller.
There's a whole bunch of criteria, and it's not clear when a rejection happens why it did. Add logs on each rejection criterion to make it clearer. Reviewed-by: Maarten Lankhorst <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> --- drivers/gpu/drm/tidss/tidss_dispc.c | 45 +++++++++++++++++++++++++++++-------- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index 2a0ec11a6c90..5943a5f25432 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -1305,4 +1305,6 @@ static int check_pixel_clock(struct dispc_device *dispc, u32 hw_videoport, unsigned long clock) { + struct tidss_device *tidss = dispc->tidss; + struct drm_device *dev = &tidss->ddev; unsigned long round_clock; @@ -1319,6 +1321,9 @@ static int check_pixel_clock(struct dispc_device *dispc, u32 hw_videoport, * use the same 5% check here. */ - if (dispc_pclk_diff(clock, round_clock) > 5) + if (dispc_pclk_diff(clock, round_clock) > 5) { + drm_dbg(dev, "Pixel clock %lu differs from rounded clock %lu by more than 5%%.", + clock, round_clock); return -EINVAL; + } return 0; @@ -1329,4 +1334,6 @@ enum drm_mode_status dispc_vp_mode_valid(struct dispc_device *dispc, const struct drm_display_mode *mode) { + struct tidss_device *tidss = dispc->tidss; + struct drm_device *dev = &tidss->ddev; u32 hsw, hfp, hbp, vsw, vfp, vbp; enum dispc_vp_bus_type bus_type; @@ -1334,12 +1341,18 @@ enum drm_mode_status dispc_vp_mode_valid(struct dispc_device *dispc, bus_type = dispc->feat->vp_bus_type[hw_videoport]; - if (WARN_ON(bus_type == DISPC_VP_TIED_OFF)) + if (WARN_ON(bus_type == DISPC_VP_TIED_OFF)) { + drm_dbg(dev, "Invalid bus type."); return MODE_BAD; + } - if (mode->hdisplay > 4096) + if (mode->hdisplay > 4096) { + drm_dbg(dev, "Number of active horizontal pixels above hardware limits."); return MODE_BAD; + } - if (mode->vdisplay > 4096) + if (mode->vdisplay > 4096) { + drm_dbg(dev, "Number of active vertical lines above hardware limits."); return MODE_BAD; + } if (check_pixel_clock(dispc, hw_videoport, mode->clock * 1000)) @@ -1347,6 +1360,8 @@ enum drm_mode_status dispc_vp_mode_valid(struct dispc_device *dispc, /* TODO: add interlace support */ - if (mode->flags & DRM_MODE_FLAG_INTERLACE) + if (mode->flags & DRM_MODE_FLAG_INTERLACE) { + drm_dbg(dev, "Interlace modes not supported."); return MODE_NO_INTERLACE; + } /* @@ -1358,6 +1373,8 @@ enum drm_mode_status dispc_vp_mode_valid(struct dispc_device *dispc, * But for simplicity we enforce that always. */ - if ((mode->hdisplay % 2) != 0) + if ((mode->hdisplay % 2) != 0) { + drm_dbg(dev, "Number of active horizontal pixels must be even."); return MODE_BAD_HVALUE; + } hfp = mode->hsync_start - mode->hdisplay; @@ -1371,10 +1388,18 @@ enum drm_mode_status dispc_vp_mode_valid(struct dispc_device *dispc, if (hsw < 1 || hsw > 256 || hfp < 1 || hfp > 4096 || - hbp < 1 || hbp > 4096) + hbp < 1 || hbp > 4096) { + drm_dbg(dev, + "Horizontal blanking or sync outside of hardware limits (fp: %u, sw: %u, bp: %u).", + hfp, hsw, hbp); return MODE_BAD_HVALUE; + } if (vsw < 1 || vsw > 256 || - vfp > 4095 || vbp > 4095) + vfp > 4095 || vbp > 4095) { + drm_dbg(dev, + "Vertical blanking or sync outside of hardware limits (fp: %u, sw: %u, bp: %u).", + vfp, vsw, vbp); return MODE_BAD_VVALUE; + } if (dispc->memory_bandwidth_limit) { @@ -1386,6 +1411,8 @@ enum drm_mode_status dispc_vp_mode_valid(struct dispc_device *dispc, bandwidth = div_u64(bandwidth, mode->htotal * mode->vtotal); - if (dispc->memory_bandwidth_limit < bandwidth) + if (dispc->memory_bandwidth_limit < bandwidth) { + drm_dbg(dev, "Required memory bandwidth outside of hardware limits."); return MODE_BAD; + } } -- 2.55.0
