On 10/29/26 2:52 PM, Anna Maniscalco wrote: > In order to be able to update the SMMU registers from CP for page table > updates we need to configure the LPAC aperture to include the context > bank that will be associated with SID 1. > > Signed-off-by: Anna Maniscalco <[email protected]> > --- > drivers/firmware/qcom/qcom_scm.c | 18 ++++++++++++++++++ > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 6 ++++++ > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + > include/linux/firmware/qcom/qcom_scm.h | 1 + > 4 files changed, 26 insertions(+) > > diff --git a/drivers/firmware/qcom/qcom_scm.c > b/drivers/firmware/qcom/qcom_scm.c > index 9b06a69d3a6d..92093399f20d 100644 > --- a/drivers/firmware/qcom/qcom_scm.c > +++ b/drivers/firmware/qcom/qcom_scm.c > @@ -1204,6 +1204,7 @@ int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) > EXPORT_SYMBOL_GPL(qcom_scm_restore_sec_cfg); > > #define QCOM_SCM_CP_APERTURE_CONTEXT_MASK GENMASK(7, 0) > +#define QCOM_SCM_LPAC_APERTURE_CONTEXT_MASK GENMASK(7, 1) > > bool qcom_scm_set_gpu_smmu_aperture_is_available(void) > { > @@ -1229,6 +1230,23 @@ int qcom_scm_set_gpu_smmu_aperture(unsigned int > context_bank) > } > EXPORT_SYMBOL_GPL(qcom_scm_set_gpu_smmu_aperture); > > +int qcom_scm_set_gpu_smmu_lpac_aperture(unsigned int context_bank) > +{
Please make qcom_scm_set_gpu_smmu_aperture() take a parameter instead - bit 8=0 is QCOM_SCM_CP_APERTURE_REG, bit 8 =1 is QCOM_SCM_CP_LPAC_APERTURE_REG Konrad
