These registers are used in the a680 hwcg init sequence downstream. Add them to the XML register list in preparation for importing said sequence.
Signed-off-by: Val Packett <[email protected]> --- drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml b/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml index 786fd7d2f674..11d57cb52ede 100644 --- a/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml +++ b/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml @@ -42,6 +42,8 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd"> <reg32 offset="0x1a880" name="GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL"/> <reg32 offset="0x1a881" name="GMU_GX_SPTPRAC_POWER_CONTROL"/> + <reg32 offset="0x1a883" name="GMU_GX_GMU_SP_RF_CONTROL_0"/> + <reg32 offset="0x1a884" name="GMU_GX_GMU_SP_RF_CONTROL_1"/> <reg32 offset="0x1b400" name="GMU_CM3_ITCM_START"/> <reg32 offset="0x1c400" name="GMU_CM3_DTCM_START"/> <reg32 offset="0x1cbf0" name="GMU_NMI_CONTROL_STATUS"/> -- 2.56.0
