On Thu, May 24, 2012 at 09:08:55PM +0300, ville.syrjala at linux.intel.com
wrote:
> From: Ville Syrj?l? <ville.syrjala at linux.intel.com>
>
> Make sure the the framebuffer stride is smaller than the maximum
> accepted by any plane.
>
> Also when using a tiled memory make sure the object stride matches
> the framebuffer stride.
>
> Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++++++++
> 1 files changed, 18 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 7cf639c..8fea475 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6643,6 +6643,17 @@ static const struct drm_framebuffer_funcs
> intel_fb_funcs = {
> .create_handle = intel_user_framebuffer_create_handle,
> };
>
> +static unsigned int intel_max_fb_stride(const struct drm_device *dev)
> +{
> + /* FIXME: BSpec for pre-Gen5 is a bit unclear on stride limits */
> + if (INTEL_INFO(dev)->gen <= 3)
> + return 8192;
8k pitch limit is gen2, gen3 can have a 4kx4k framebuffer @32bit.
-Daniel
> + else if (INTEL_INFO(dev)->gen <= 4)
> + return 16384;
Iirc gen4 can also do 32k, see the pixel-based limits in
intel_modset_init.
> + else
> + return 32768;
> +}
> +
> int intel_framebuffer_init(struct drm_device *dev,
> struct intel_framebuffer *intel_fb,
> struct drm_mode_fb_cmd2 *mode_cmd,
> @@ -6656,6 +6667,13 @@ int intel_framebuffer_init(struct drm_device *dev,
> if (mode_cmd->pitches[0] & 63)
> return -EINVAL;
>
> + if (mode_cmd->pitches[0] > intel_max_fb_stride(dev))
> + return -EINVAL;
> +
> + if (obj->tiling_mode != I915_TILING_NONE &&
> + mode_cmd->pitches[0] != obj->stride)
> + return -EINVAL;
> +
> /* Reject formats not supported by any plane early. */
> switch (mode_cmd->pixel_format) {
> case DRM_FORMAT_C8:
> --
> 1.7.3.4
>
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--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
