On Wed, 2002-05-01 at 00:36, Michel Dänzer wrote:
> On Tue, 2002-04-30 at 23:53, Leif Delgass wrote:
> > On Tue, 30 Apr 2002, José Fonseca wrote:
> > 
> > > On 2002.04.30 22:07 José Fonseca wrote:
> > > > ... Next in mach64_drv.h, let's try the following definitions for the 
> > > > MMIO:
> > > > 
> > > >   #define MACH64_READ(reg)      readl(MACH64_ADDR(reg))
> > > >   #define MACH64_WRITE(reg,val) writel(MACH64_ADDR(val, reg))
> > > > 
> > > 
> > > Sorry, i've mistaken writting it. It's instead
> > > 
> > > #define MACH64_READ(reg)  readl(MACH64_ADDR(reg))
> > > #define MACH64_WRITE(reg,val)     writel(val, MACH64_ADDR(reg))
> > 
> > There's a wrinkle for the vertex buffers though.  The register offsets and
> > data in the buffer have already been swapped to little-endian, whereas the
> > state updates and such using the DMA* macros (which in turn use
> > MACH64_WRITE) pass data to the macros in cpu endianess.  So in the
> > pseudo-DMA code in _dispatch_vertex, I changed the
> > 
> > MACH64_WRITE(reg, *p++); 
> > 
> > to
> > 
> > MACH64_DEREF(reg) = *p++;
> 
> Maybe better
> 
> MACH64_WRITE(le32_to_cpu(*p++), reg);
> 
> ?

Whoops, should be:

MACH64_WRITE(reg, le32_to_cpu(*p++));

of course... the difference in the order of arguments between this and
read/writel is confusing...


-- 
Earthling Michel Dänzer (MrCooper)/ Debian GNU/Linux (powerpc) developer
XFree86 and DRI project member   /  CS student, Free Software enthusiast

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