On 1 May 2002, Michel Dänzer wrote:

> On Tue, 2002-04-30 at 23:53, Leif Delgass wrote:
> > On Tue, 30 Apr 2002, José Fonseca wrote:
> > 
> > > On 2002.04.30 22:07 José Fonseca wrote:
> > > > ... Next in mach64_drv.h, let's try the following definitions for the 
> > > > MMIO:
> > > > 
> > > >   #define MACH64_READ(reg)      readl(MACH64_ADDR(reg))
> > > >   #define MACH64_WRITE(reg,val) writel(MACH64_ADDR(val, reg))
> > > > 
> > > 
> > > Sorry, i've mistaken writting it. It's instead
> > > 
> > > #define MACH64_READ(reg)  readl(MACH64_ADDR(reg))
> > > #define MACH64_WRITE(reg,val)     writel(val, MACH64_ADDR(reg))
> > 
> > There's a wrinkle for the vertex buffers though.  The register offsets and
> > data in the buffer have already been swapped to little-endian, whereas the
> > state updates and such using the DMA* macros (which in turn use
> > MACH64_WRITE) pass data to the macros in cpu endianess.  So in the
> > pseudo-DMA code in _dispatch_vertex, I changed the
> > 
> > MACH64_WRITE(reg, *p++); 
> > 
> > to
> > 
> > MACH64_DEREF(reg) = *p++;
> 
> Maybe better
> 
> MACH64_WRITE(le32_to_cpu(*p++), reg);
> 
> ?
> 
> > because the value (*p) is already little-endian, whereas the register
> > address has to be swapped from little-endian back to big-endian for the
> > MMSELECT(reg).  So wouldn't you have to swap the value back to big-endian
> > as well in order to use this modified MACH64_WRITE macro?
> 
> Yes, but it's already done correctly AFAICS on mach64_state.c line 530:
> 
>                                         reg = le32_to_cpu(*p++);
> 

That's the register address (addresses and data are interleaved in the 
buffer pointed to by p).  The data isn't swapped back to little-endian, 
but your suggestion above should work (just need to switch the args):

MACH64_WRITE(reg, le32_to_cpu(*p++));

-- 
Leif Delgass 
http://www.retinalburn.net


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