Linus Torvalds wrote:
On Fri, 30 May 2003, Linus Torvalds wrote:

Modulo that, X is happy, with no error messages apart from a mention of
the irq issue in the logs up until the lockup:

        (II) RADEON(0): [drm] failure adding irq handler, there is a device already 
using that irq
        [drm] falling back to irq-free operation
        (II) RADEON(0): [drm] Initialized kernel agp heap manager, 5111808
        (II) RADEON(0): Direct rendering enabled


Forcing fifo debugging makes the thing print out an endless loop of

        [drm:radeon_do_wait_for_idle] *ERROR* failed!
        radeon_status:
        RBBM_STATUS = 0x80010140
        CP_RB_RTPR = 0x00009b6f
        CP_RB_WTPR = 0x00009b6f
        AIC_CNTL = 0x00000000
        AIC_STAT = 0x00000004
        AIC_PT_BASE = 0x00000000
        TLB_ADDR = 0x00000000
        TLB_DATA = 0x00000000

which doesn't tell me anything, but maybe somebody with docs can tell why
it claims to be busy. The ring buffer read and write pointers change every
printout (increment by 6), but the read pointer is always the same as the write pointer.


Reading the header files, RBBM_STATUS seems to say that there are 64
entries in the FIFO, and that the FIFO is busy. Which doesn't make much
sense to me. Anything useful I can do to debug this?

The results I get if I have radeon_do_wait_for_idle() show this info unconditionally are pretty similar:


Jun  2 14:53:24 test9 kernel: radeon_status:
Jun  2 14:53:24 test9 kernel: RBBM_STATUS = 0x00000140
Jun  2 14:53:24 test9 kernel: CP_RB_RTPR = 0x0000020d
Jun  2 14:53:24 test9 kernel: CP_RB_WTPR = 0x0000020d
Jun  2 14:53:24 test9 kernel: AIC_CNTL = 0x00000000
Jun  2 14:53:24 test9 kernel: AIC_STAT = 0x00000004
Jun  2 14:53:24 test9 kernel: AIC_PT_BASE = 0x00000000
Jun  2 14:53:24 test9 kernel: TLB_ADDR = 0x00000000
Jun  2 14:53:24 test9 kernel: TLB_DATA = 0x00000000


Just the two bits in RBBM_STATUS different. Bit 31 is a general busy flag, while bit 16 is saying that the command processor (CP) is busy. I take this as meaning that it thinks there are commands on the ring not yet fully processed - which doesn't make sense.



Under what circumstances does this actually happen? First 3d app run? Even something like 'glinfo'?


Keith



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