Hi,
The attached patch adds pci init code for mesa solo with the radeon driver thanks to a new configuration option in miniglx.conf.
And of course, you're not interested in my debugging printf's. A patch without my printfs is attached.
Sorry for the noise.
Stephane
? lib ? progs/miniglx/depend ? progs/miniglx/manytex ? progs/miniglx/miniglxsample ? progs/miniglx/miniglxtest ? progs/miniglx/sample_server ? progs/miniglx/sample_server2 ? progs/miniglx/texline ? src/glut/mini/depend ? src/glx/mini/depend ? src/mesa/depend ? src/mesa/drivers/dri/fb/depend ? src/mesa/drivers/dri/gamma/depend ? src/mesa/drivers/dri/mach64/depend ? src/mesa/drivers/dri/mga/depend ? src/mesa/drivers/dri/r128/depend ? src/mesa/drivers/dri/r200/depend ? src/mesa/drivers/dri/radeon/depend ? src/mesa/drivers/dri/sis/depend ? src/mesa/drivers/dri/tdfx/depend ? src/mesa/x86/gen_matypes ? src/mesa/x86/matypes.h Index: configs/default =================================================================== RCS file: /cvs/mesa/Mesa/configs/default,v retrieving revision 1.5 diff -u -r1.5 default --- configs/default 13 Apr 2004 04:11:32 -0000 1.5 +++ configs/default 2 May 2004 15:47:48 -0000 @@ -11,7 +11,7 @@ MESA_TINY=0 # external projects -DRM_SOURCE_PATH=/home/dri/drm +DRM_SOURCE_PATH=/home/icps/marchesin/full-tree/dri/drm # Compiler and flags CC = cc Index: src/glx/mini/driver.h =================================================================== RCS file: /cvs/mesa/Mesa/src/glx/mini/driver.h,v retrieving revision 1.3 diff -u -r1.3 driver.h --- src/glx/mini/driver.h 14 Apr 2004 01:33:27 -0000 1.3 +++ src/glx/mini/driver.h 2 May 2004 15:47:48 -0000 @@ -67,7 +67,8 @@ int bpp; int cpp; int agpmode; - + int isPCI; + unsigned long FBStart; /**< \brief physical address of the framebuffer */ unsigned long MMIOStart; /**< \brief physical address of the MMIO region */ Index: src/glx/mini/example.miniglx.conf =================================================================== RCS file: /cvs/mesa/Mesa/src/glx/mini/example.miniglx.conf,v retrieving revision 1.2 diff -u -r1.2 example.miniglx.conf --- src/glx/mini/example.miniglx.conf 14 Apr 2004 02:14:15 -0000 1.2 +++ src/glx/mini/example.miniglx.conf 2 May 2004 15:47:48 -0000 @@ -14,6 +14,9 @@ # look in /proc/pci. pciBusID=PCI:1:0:0 +# The card is PCI or AGP ? +isPCI=0 + # Virtual screen dimensions. Can reduce this to save videocard memory # at the expense of maximum window size available. virtualWidth=1280 Index: src/glx/mini/miniglx.c =================================================================== RCS file: /cvs/mesa/Mesa/src/glx/mini/miniglx.c,v retrieving revision 1.6 diff -u -r1.6 miniglx.c --- src/glx/mini/miniglx.c 14 Apr 2004 01:33:27 -0000 1.6 +++ src/glx/mini/miniglx.c 2 May 2004 15:47:49 -0000 @@ -794,6 +794,7 @@ dpy->driverContext.cpp = 4; dpy->rotateMode = 0; dpy->driverContext.agpmode = 1; + dpy->driverContext.isPCI = 0; fname = getenv("MINIGLX_CONF"); if (!fname) fname = "/etc/miniglx.conf"; @@ -863,6 +864,9 @@ if (sscanf(val, "%d", &dpy->driverContext.agpmode) != 1) fprintf(stderr, "malformed agpmode: %s\n", opt); } + else if (strcmp(opt, "isPCI") == 0) { + dpy->driverContext.isPCI = atoi(val) ? 1 : 0; + } } fclose(file); Index: src/mesa/drivers/dri/radeon/server/radeon.h =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/server/radeon.h,v retrieving revision 1.5 diff -u -r1.5 radeon.h --- src/mesa/drivers/dri/radeon/server/radeon.h 15 Apr 2004 01:15:38 -0000 1.5 +++ src/mesa/drivers/dri/radeon/server/radeon.h 2 May 2004 15:47:50 -0000 @@ -109,6 +109,8 @@ drmSize registerSize; /**< \brief MMIO register map size */ drmHandle registerHandle; /**< \brief MMIO register map handle */ + int IsPCI; /* Current card is a PCI card */ + /** * \name AGP */ Index: src/mesa/drivers/dri/radeon/server/radeon_dri.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/server/radeon_dri.c,v retrieving revision 1.9 diff -u -r1.9 radeon_dri.c --- src/mesa/drivers/dri/radeon/server/radeon_dri.c 15 Apr 2004 01:15:38 -0000 1.9 +++ src/mesa/drivers/dri/radeon/server/radeon_dri.c 2 May 2004 15:47:50 -0000 @@ -431,6 +431,88 @@ return 1; } +/* Initialize the PCI GART state. Request memory for use in PCI space, + * and initialize the Radeon registers to point to that memory. + */ +static int RADEONDRIPciInit(const DRIDriverContext *ctx, RADEONInfoPtr info) +{ + int ret; + int flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL; + int s, l; + + ret = drmScatterGatherAlloc(ctx->drmFD, info->gartSize*1024*1024, + &info->gartMemHandle); + if (ret < 0) { + fprintf(stderr, "[pci] Out of memory (%d)\n", ret); + return 0; + } + fprintf(stderr, + "[pci] %d kB allocated with handle 0x%08x\n", + info->gartSize*1024, info->gartMemHandle); + + info->gartOffset = 0; + + /* Initialize the CP ring buffer data */ + info->ringStart = info->gartOffset; + info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE; + + info->ringReadOffset = info->ringStart + info->ringMapSize; + info->ringReadMapSize = DRM_PAGE_SIZE; + + /* Reserve space for vertex/indirect buffers */ + info->bufStart = info->ringReadOffset + info->ringReadMapSize; + info->bufMapSize = info->bufSize*1024*1024; + + /* Reserve the rest for AGP textures */ + info->gartTexStart = info->bufStart + info->bufMapSize; + s = (info->gartSize*1024*1024 - info->gartTexStart); + l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); + if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; + info->gartTexMapSize = (s >> l) << l; + info->log2GARTTexGran = l; + + if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize, + DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) { + fprintf(stderr, + "[pci] Could not add ring mapping\n"); + return 0; + } + fprintf(stderr, + "[pci] ring handle = 0x%08lx\n", info->ringHandle); + + if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize, + DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) { + fprintf(stderr, + "[pci] Could not add ring read ptr mapping\n"); + return 0; + } + fprintf(stderr, + "[pci] ring read ptr handle = 0x%08lx\n", + info->ringReadPtrHandle); + + if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize, + DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) { + fprintf(stderr, + "[pci] Could not add vertex/indirect buffers mapping\n"); + return 0; + } + fprintf(stderr, + "[pci] vertex/indirect buffers handle = 0x%08lx\n", + info->bufHandle); + + if (drmAddMap(ctx->drmFD, info->gartTexStart, info->gartTexMapSize, + DRM_SCATTER_GATHER, 0, &info->gartTexHandle) < 0) { + fprintf(stderr, + "[pci] Could not add GART texture map mapping\n"); + return 0; + } + fprintf(stderr, + "[pci] GART texture map handle = 0x%08lx\n", + info->gartTexHandle); + + return 1; +} + /** * \brief Initialize the kernel data structures and enable the CP engine. @@ -462,7 +544,7 @@ /* This is the struct passed to the kernel module for its initialization */ drmInfo.sarea_priv_offset = sizeof(drm_sarea_t); - drmInfo.is_pci = 0; + drmInfo.is_pci = ctx->isPCI; drmInfo.cp_mode = RADEON_DEFAULT_CP_BM_MODE; drmInfo.gart_size = info->gartSize*1024*1024; drmInfo.ring_size = info->ringSize*1024*1024; @@ -536,7 +618,7 @@ info->bufNumBufs = drmAddBufs(ctx->drmFD, info->bufMapSize / RADEON_BUFFER_SIZE, RADEON_BUFFER_SIZE, - DRM_AGP_BUFFER, + ctx->isPCI ? DRM_SG_BUFFER : DRM_AGP_BUFFER, info->bufStart); if (info->bufNumBufs <= 0) { @@ -846,12 +928,17 @@ return 0; } - /* Initialize AGP */ - if (!RADEONDRIAgpInit(ctx, info)) { - return 0; + if (ctx->isPCI) { + /* Initialize PCI */ + if (!RADEONDRIPciInit(ctx, info)) + return 0; + } + else { + /* Initialize AGP */ + if (!RADEONDRIAgpInit(ctx, info)) + return 0; } - /* Memory manager setup */ if (!RADEONMemoryInit(ctx, info)) { return 0; @@ -920,7 +1007,7 @@ pRADEONDRI->height = ctx->shared.virtualHeight; pRADEONDRI->depth = ctx->bpp; /* XXX: depth */ pRADEONDRI->bpp = ctx->bpp; - pRADEONDRI->IsPCI = 0; + pRADEONDRI->IsPCI = ctx->isPCI; pRADEONDRI->AGPMode = ctx->agpmode; pRADEONDRI->frontOffset = info->frontOffset; pRADEONDRI->frontPitch = info->frontPitch;