Robert Voigt wrote:
Stephane Marchesin wrote:

Stephane Marchesin wrote:

Hi,

The attached patch adds pci init code for mesa solo with the radeon driver thanks to a new configuration option in miniglx.conf.




And of course, you're not interested in my debugging printf's. A patch without my printfs is attached.
Sorry for the noise.



Tried it with a rv200, Radeon Mobility 7500 LW PCI. Example programs output messages like usual, but don't draw anything.


The kernel is 2.4.26, and drm is from mesa cvs.

Any idea where I should look?

Some more information:


When I start miniglxtest, it prints its messages, but doesn't draw anything. The display gets very slow. It takes several seconds to print a line of text. This is still the case after miniglxtest has ended, when I do other stuff on this terminal. It stops being slow when I switch to another terminal and back.

The output of sample_server is attached.
[miniglx] probed chipset 0x4c57
got MMIOAddress 0x40108000 offset 33554432
[drm] added 4096 byte SAREA at 0xe0ac3000
[drm] mapped SAREA 0xe0ac3000 to 0x4010c000, size 4096
[drm] framebuffer handle = 0xf0000000
[drm] register handle = 0xe8000000
[pci] 8192 kB allocated with handle 0xe2aee000
[pci] ring handle = 0xe2aee000
[pci] ring read ptr handle = 0xe2bef000
[pci] vertex/indirect buffers handle = 0xe2bf0000
[pci] GART texture map handle = 0xe2df0000
Using 8 MB AGP aperture
Using 1 MB for the ring buffer
Using 2 MB for vertex/indirect buffers
Using 1 MB for AGP textures
Will use back buffer at offset 0x300000
Will use depth buffer at offset 0x600000
Will use 23552 kb for textures at offset 0x900000
[drm] Added 32 65536 byte vertex/indirect buffers
[drm] dma control initialized, using IRQ 9
[drm] Initialized kernel gart heap manager, 5111808
page flipping disabled
[miniglx] Setting mode: visible 1024x768 virtual 1024x768x32
[miniglx] Readback mode: visible 1024x768 virtual 1024x768x32
RADEONEngineRestore

Reply via email to