Dave,

> On 3/4/07, Dave Airlie <[EMAIL PROTECTED] > wrote:
> >
> >
> >
> > Have you done this yet? I'd be interested in finding out how the
> > entries
> > in the table map to memory space.. there are two mappings types sso
> > far,
> > PCI and PCIE... PCI is just the bus addres, PCIE is bus address >> 8 |
> > 0xc.. mayhaps we need another one..
>
>
I think that I figured the mapping.  It is pretty simple:
address in table = (bus_address & 0xc);

I dumped the GART table.  From the card's point of view, I knew that the
ring buffer was mapped at the beginning of the GART mappable pages. (The
stuff that the GART maps was located at 0x58000000, and that is where the
ring buffer is located.)

I figured out the virtual address of the ring buffer in the X server. I
wrote a small kernel module to find the task (given a pid), and translate
the user space virtual address to a physical address. (using
get_user_pages).

In a different experiment, I determined I figured out that for some reason
whatever I write to the GART table gets endian swapped on read out.  (If I
write: 0x12345678, I read back: 0x78563412)  (I use:  ../mmapr/mmapr
/dev/mem 0x33e80000 64 |  xxd -g4 )

Anyway, here are my results:

Column 1: Physical addr of Xorg Ring Buf
Column 2: GART table entries
Column 3: Endian Corrected GART table entries

22e1f000   0cf0e122  22e1f00c
22e20000   0c00e222  22e2000c
22e21000   0c10e222  22e2100c
22e22000   0c20e222  22e2200c
22e23000   0c30e222  22e2300c
22e24000   0c40e222  22e2400c
22e25000   0c50e222  22e2500c
22e26000   0c60e222  22e2600c

So, if you compare the first and last column, you can see the equation is:
address in table = (bus_address & 0xc);

I modified the gart code to allocate a table in RAM, and to write the
addresses as you see above.
Unfortunately, my cp STILL doesn't seem to work (I can't write to a scratch
register and read it back..).

I'm gonna run my kernel module on my hacked radeon driver, so that I am sure
that what is written into the GART table matches the physical addresses of
the ring buffer.  (ie, I am writing the commands where the card is reading
them.)

That's for tonight. (I hope.)

Cheers,
--Phil
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