Dave Airlie wrote: > So in an attempt to avoid flushes on remap etc, I've attempt to avoid > doing anymore than 1 cache flush per batchbuffer.. > > http://people.freedesktop.org/~airlied/i915-hack-cacheflush.txt > > I allocate the batchbuffers CACHED and then flush the cache for those > pages post relocating.. > > I need to checkout the speedups on SMP machines as the ipi overheards are > much worse there... > > this code is a dirty hack as it does x86 specifics in the drm, but I'm > just throwing the idea out there.. > > Dave. > > Dave, I like the idea of moving over to clflush, but I still think we shouldn't use TT drmBOs for batch buffers and buffers with similar use. (i915tex uses a sub-allocator for batch buffers, which avoids the cache flushes completely during normal rendering). I think something similar should be used from the X server.
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