On Mon, Jan 4, 2010 at 11:55 PM, Dave Airlie <airl...@gmail.com> wrote:
> From: Dave Airlie <airl...@redhat.com>
>
> This detects if the sideport memory is enabled on these IGPs, and if
> it is VRAM is evicted on suspend/resume.
>
> This should fix s/r issues on some IGPs.


NACK.  that register is not reliable.  You need to get the info from
the Integrated System Information table in the bios.  On pre-atom
systems the memory reference clock frequency (offset 0x4-0x5) field in
that table will be zero if no sideport memory is present.  On atom
systems, ATOM_INTEGRATED_SYSTEM_INFO.ucMemoryType will be 0 if no
sideport is present for v1 tables (rs6xx), for v2,
ATOM_INTEGRATED_SYSTEM_INFO_V2.ulBootUpSidePortClock will be zero if
no sideport is present (rs780/rs880).

Alex

>
> TODO:
> check rs880 is same as rs780
> add rs480 support if possible.
>
> Signed-off-by: Dave Airlie <airl...@redhat.com>
> ---
>  drivers/gpu/drm/radeon/r600.c          |    7 +++++++
>  drivers/gpu/drm/radeon/r600d.h         |    3 +++
>  drivers/gpu/drm/radeon/radeon.h        |    1 +
>  drivers/gpu/drm/radeon/radeon_object.c |    6 ++++--
>  drivers/gpu/drm/radeon/rs690.c         |    5 +++++
>  drivers/gpu/drm/radeon/rs690d.h        |    2 ++
>  6 files changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index 5c6058c..35ff64b 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -726,6 +726,13 @@ int r600_mc_init(struct radeon_device *rdev)
>        a.full = rfixed_const(100);
>        rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
>        rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
> +
> +       if ((rdev->family == CHIP_RS780) ||
> +           (rdev->family == CHIP_RS880)) {
> +               tmp = RREG32_MC(R_000012_MC_MISC_UMA_CNTL);
> +               if (G_000012_MC_SIDE_PORT_PRESENT(tmp))
> +                       rdev->mc.igp_sideport_enabled = true;
> +       }
>        return 0;
>  }
>
> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
> index 05894ed..8020a98 100644
> --- a/drivers/gpu/drm/radeon/r600d.h
> +++ b/drivers/gpu/drm/radeon/r600d.h
> @@ -882,4 +882,7 @@
>  #define                S_000E60_SOFT_RESET_VMC(x)              (((x) & 1) << 
> 17)
>
>  #define R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL          0x5480
> +
> +#define R_000012_MC_MISC_UMA_CNTL                       0x12
> +#define   G_000012_MC_SIDE_PORT_PRESENT(x)              (((x) >> 31) & 0x1)
>  #endif
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 53b5560..0b00b41 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -319,6 +319,7 @@ struct radeon_mc {
>        u64                     real_vram_size;
>        int                     vram_mtrr;
>        bool                    vram_is_ddr;
> +       bool                    igp_sideport_enabled;
>  };
>
>  int radeon_mc_setup(struct radeon_device *rdev);
> diff --git a/drivers/gpu/drm/radeon/radeon_object.c 
> b/drivers/gpu/drm/radeon/radeon_object.c
> index d9ffe1f..1c70d95 100644
> --- a/drivers/gpu/drm/radeon/radeon_object.c
> +++ b/drivers/gpu/drm/radeon/radeon_object.c
> @@ -221,8 +221,10 @@ int radeon_bo_unpin(struct radeon_bo *bo)
>  int radeon_bo_evict_vram(struct radeon_device *rdev)
>  {
>        if (rdev->flags & RADEON_IS_IGP) {
> -               /* Useless to evict on IGP chips */
> -               return 0;
> +               if (rdev->mc.igp_sideport_enabled == false)
> +                       /* Useless to evict on IGP chips
> +                          unless sideport is in use */
> +                       return 0;
>        }
>        return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
>  }
> diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
> index 1e22f52..74cc57c 100644
> --- a/drivers/gpu/drm/radeon/rs690.c
> +++ b/drivers/gpu/drm/radeon/rs690.c
> @@ -132,6 +132,7 @@ void rs690_pm_info(struct radeon_device *rdev)
>  void rs690_vram_info(struct radeon_device *rdev)
>  {
>        fixed20_12 a;
> +       u32 tmp;
>
>        rs400_gart_adjust_size(rdev);
>
> @@ -160,6 +161,10 @@ void rs690_vram_info(struct radeon_device *rdev)
>        a.full = rfixed_const(16);
>        /* core_bandwidth = sclk(Mhz) * 16 */
>        rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
> +
> +       tmp = RREG32_MC(R_00005F_MC_MISC_UMA_CNTL);
> +       if (G_00005F_MC_SIDE_PORT_PRESENT(tmp))
> +               rdev->mc.igp_sideport_enabled = true;
>  }
>
>  static int rs690_mc_init(struct radeon_device *rdev)
> diff --git a/drivers/gpu/drm/radeon/rs690d.h b/drivers/gpu/drm/radeon/rs690d.h
> index 62d31e7..e74071e 100644
> --- a/drivers/gpu/drm/radeon/rs690d.h
> +++ b/drivers/gpu/drm/radeon/rs690d.h
> @@ -233,6 +233,8 @@
>  #define   G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x)        (((x) >> 16) & 0xF)
>  #define   C_006D58_LB_D2_MAX_REQ_OUTSTANDING           0xFFF0FFFF
>
> +#define R_00005F_MC_MISC_UMA_CNTL                    0x00005F
> +#define   G_00005F_MC_SIDE_PORT_PRESENT(x)             (((x) >> 31) & 0x1)
>
>  #define R_000090_MC_SYSTEM_STATUS                    0x000090
>  #define   S_000090_MC_SYSTEM_IDLE(x)                   (((x) & 0x1) << 0)
> --
> 1.6.5.2
>
>
> ------------------------------------------------------------------------------
> This SF.Net email is sponsored by the Verizon Developer Community
> Take advantage of Verizon's best-in-class app development support
> A streamlined, 14 day to market process makes app distribution fast and easy
> Join now and get one step closer to millions of Verizon customers
> http://p.sf.net/sfu/verizon-dev2dev
> --
> _______________________________________________
> Dri-devel mailing list
> Dri-devel@lists.sourceforge.net
> https://lists.sourceforge.net/lists/listinfo/dri-devel
>

------------------------------------------------------------------------------
This SF.Net email is sponsored by the Verizon Developer Community
Take advantage of Verizon's best-in-class app development support
A streamlined, 14 day to market process makes app distribution fast and easy
Join now and get one step closer to millions of Verizon customers
http://p.sf.net/sfu/verizon-dev2dev 
--
_______________________________________________
Dri-devel mailing list
Dri-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/dri-devel

Reply via email to