2010/1/6 Rafał Miłecki <zaj...@gmail.com>:
> 2010/1/5 Alex Deucher <alexdeuc...@gmail.com>:
>> Updated patch to use bios tables attached.
>
> What about reading clock of sideport memory? Standard way? Could we do
> following?
Nope. Sideport mclk is different than the mclk on discrete chips. If
you look at the atom tables you'll notice that GetMemoryClock and
SetMemoryClock are empty on IGP chips. AFAIK, the sideport clock is
not usually changed.
Alex
>
>
> diff --git a/drivers/gpu/drm/radeon/radeon_device.c
> b/drivers/gpu/drm/radeon/radeon_device.c
> index c49cda9..b996a5e 100644
> --- a/drivers/gpu/drm/radeon/radeon_device.c
> +++ b/drivers/gpu/drm/radeon/radeon_device.c
> @@ -392,7 +392,7 @@ int radeon_asic_init(struct radeon_device *rdev)
> return -EINVAL;
> }
>
> - if (rdev->flags & RADEON_IS_IGP) {
> + if (rdev->flags & RADEON_IS_IGP && !rdev->mc.igp_sideport_enabled) {
> rdev->asic->get_memory_clock = NULL;
> rdev->asic->set_memory_clock = NULL;
> }
>
>
> --
> Rafał
>
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