2010/2/18 Dave Airlie <airl...@gmail.com>: > From: Dave Airlie <airl...@redhat.com> > > This patch adds a check on avivo chips to see if we are in the VBL > region for the active crtcs when we trigger the engine change. > > I appear to have glitches locally on pm transistion (not sure all > fixes are in yet) and this at least seems to be correct here, > maybe others can test on systems with no glitches.
Because we are totally out of sync with VBLANK. If we correctly sync with it, it's just a lucky case. Please check my [PATCH] drm/radeon/kms: really wait for VBLANK in PM code and reply in thread where I posted it. > + /* check if we are in vblank */ > + radeon_pm_debug_check_in_vbl(rdev, false); > radeon_set_power_state(rdev); > + radeon_pm_debug_check_in_vbl(rdev, true); > rdev->pm.planned_action = PM_ACTION_NONE; It adds some reading & printing steps before every reclock, while we really want it to happen as soon as possible. Maybe you could execute this only on some #ifdef RADEON_PM_DEBUG ? -- Rafał ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- _______________________________________________ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
