This is the first step to clean up radeon_asic.h and make it into a real header file (i.e. kill the static struct definitions). Then it can be included by the <asic>.c files to compile-check the declarations of shared functions (some differ atm).
This first patch just moves the r100_asic struct to r100.c To accomplish this, the declarations for a few shared functions had to be moved from radeon_asic.h to radeon.h. They'll move back when this cleanup is complete. Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch> --- drivers/gpu/drm/radeon/r100.c | 38 ++++++++++++++++++++++++ drivers/gpu/drm/radeon/radeon.h | 13 ++++++++ drivers/gpu/drm/radeon/radeon_asic.h | 52 +--------------------------------- 3 files changed, 52 insertions(+), 51 deletions(-) diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 91eb762..facf3d8 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -3538,3 +3538,41 @@ int r100_init(struct radeon_device *rdev) } return 0; } + +struct radeon_asic r100_asic = { + .init = &r100_init, + .fini = &r100_fini, + .suspend = &r100_suspend, + .resume = &r100_resume, + .vga_set_state = &r100_vga_set_state, + .gpu_reset = &r100_gpu_reset, + .gart_tlb_flush = &r100_pci_gart_tlb_flush, + .gart_set_page = &r100_pci_gart_set_page, + .cp_commit = &r100_cp_commit, + .ring_start = &r100_ring_start, + .ring_test = &r100_ring_test, + .ring_ib_execute = &r100_ring_ib_execute, + .irq_set = &r100_irq_set, + .irq_process = &r100_irq_process, + .get_vblank_counter = &r100_get_vblank_counter, + .fence_ring_emit = &r100_fence_ring_emit, + .cs_parse = &r100_cs_parse, + .copy_blit = &r100_copy_blit, + .copy_dma = NULL, + .copy = &r100_copy_blit, + .get_engine_clock = &radeon_legacy_get_engine_clock, + .set_engine_clock = &radeon_legacy_set_engine_clock, + .get_memory_clock = &radeon_legacy_get_memory_clock, + .set_memory_clock = NULL, + .get_pcie_lanes = NULL, + .set_pcie_lanes = NULL, + .set_clock_gating = &radeon_legacy_set_clock_gating, + .set_surface_reg = r100_set_surface_reg, + .clear_surface_reg = r100_clear_surface_reg, + .bandwidth_update = &r100_bandwidth_update, + .hpd_init = &r100_hpd_init, + .hpd_fini = &r100_hpd_fini, + .hpd_sense = &r100_hpd_sense, + .hpd_set_polarity = &r100_hpd_set_polarity, + .ioctl_wait_idle = NULL, +}; diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 829e26e..bf5a2e6 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -862,6 +862,19 @@ union radeon_asic_config { struct rv770_asic rv770; }; +/* WIP: Declarations from radeon_asic.h + * These will move back to radeon_asic.h as soon as it has morphed into + * a real header. */ +uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); +void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); +uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev); +void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); + +uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); +void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); +uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); +void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); +void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); /* * IOCTL. diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index d3a157b..a2b4bd4 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h @@ -29,20 +29,6 @@ #define __RADEON_ASIC_H__ /* - * common functions - */ -uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); -void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); -uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev); -void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); - -uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); -void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); -uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); -void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); -void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); - -/* * r100,rv100,rs100,rv200,rs200 */ extern int r100_init(struct radeon_device *rdev); @@ -83,43 +69,7 @@ bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); void r100_hpd_set_polarity(struct radeon_device *rdev, enum radeon_hpd_id hpd); -static struct radeon_asic r100_asic = { - .init = &r100_init, - .fini = &r100_fini, - .suspend = &r100_suspend, - .resume = &r100_resume, - .vga_set_state = &r100_vga_set_state, - .gpu_reset = &r100_gpu_reset, - .gart_tlb_flush = &r100_pci_gart_tlb_flush, - .gart_set_page = &r100_pci_gart_set_page, - .cp_commit = &r100_cp_commit, - .ring_start = &r100_ring_start, - .ring_test = &r100_ring_test, - .ring_ib_execute = &r100_ring_ib_execute, - .irq_set = &r100_irq_set, - .irq_process = &r100_irq_process, - .get_vblank_counter = &r100_get_vblank_counter, - .fence_ring_emit = &r100_fence_ring_emit, - .cs_parse = &r100_cs_parse, - .copy_blit = &r100_copy_blit, - .copy_dma = NULL, - .copy = &r100_copy_blit, - .get_engine_clock = &radeon_legacy_get_engine_clock, - .set_engine_clock = &radeon_legacy_set_engine_clock, - .get_memory_clock = &radeon_legacy_get_memory_clock, - .set_memory_clock = NULL, - .get_pcie_lanes = NULL, - .set_pcie_lanes = NULL, - .set_clock_gating = &radeon_legacy_set_clock_gating, - .set_surface_reg = r100_set_surface_reg, - .clear_surface_reg = r100_clear_surface_reg, - .bandwidth_update = &r100_bandwidth_update, - .hpd_init = &r100_hpd_init, - .hpd_fini = &r100_hpd_fini, - .hpd_sense = &r100_hpd_sense, - .hpd_set_polarity = &r100_hpd_set_polarity, - .ioctl_wait_idle = NULL, -}; +extern struct radeon_asic r100_asic; /* * r200,rv250,rs300,rv280 -- 1.7.0 ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. 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