Like for r200.

Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
---
 drivers/gpu/drm/radeon/evergreen.c   |   43 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.h |   35 +--------------------------
 2 files changed, 44 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen.c 
b/drivers/gpu/drm/radeon/evergreen.c
index bd2e7aa..618006a 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -765,3 +765,46 @@ void evergreen_fini(struct radeon_device *rdev)
        rdev->bios = NULL;
        radeon_dummy_page_fini(rdev);
 }
+
+void r600_vga_set_state(struct radeon_device *rdev, bool state);
+void r600_pcie_gart_tlb_flush(struct radeon_device *rdev);
+int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
+int r600_set_surface_reg(struct radeon_device *rdev, int reg,
+                        uint32_t tiling_flags, uint32_t pitch,
+                        uint32_t offset, uint32_t obj_size);
+int r600_clear_surface_reg(struct radeon_device *rdev, int reg);
+
+struct radeon_asic evergreen_asic = {
+       .init = &evergreen_init,
+       .fini = &evergreen_fini,
+       .suspend = &evergreen_suspend,
+       .resume = &evergreen_resume,
+       .cp_commit = NULL,
+       .gpu_reset = &evergreen_gpu_reset,
+       .vga_set_state = &r600_vga_set_state,
+       .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
+       .gart_set_page = &rs600_gart_set_page,
+       .ring_test = NULL,
+       .ring_ib_execute = NULL,
+       .irq_set = NULL,
+       .irq_process = NULL,
+       .get_vblank_counter = NULL,
+       .fence_ring_emit = NULL,
+       .cs_parse = NULL,
+       .copy_blit = NULL,
+       .copy_dma = NULL,
+       .copy = NULL,
+       .get_engine_clock = &radeon_atom_get_engine_clock,
+       .set_engine_clock = &radeon_atom_set_engine_clock,
+       .get_memory_clock = &radeon_atom_get_memory_clock,
+       .set_memory_clock = &radeon_atom_set_memory_clock,
+       .set_pcie_lanes = NULL,
+       .set_clock_gating = NULL,
+       .set_surface_reg = r600_set_surface_reg,
+       .clear_surface_reg = r600_clear_surface_reg,
+       .bandwidth_update = &evergreen_bandwidth_update,
+       .hpd_init = &evergreen_hpd_init,
+       .hpd_fini = &evergreen_hpd_fini,
+       .hpd_sense = &evergreen_hpd_sense,
+       .hpd_set_polarity = &evergreen_hpd_set_polarity,
+};
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h 
b/drivers/gpu/drm/radeon/radeon_asic.h
index 57dceeb..4db2e37 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -259,39 +259,6 @@ bool evergreen_hpd_sense(struct radeon_device *rdev, enum 
radeon_hpd_id hpd);
 void evergreen_hpd_set_polarity(struct radeon_device *rdev,
                                enum radeon_hpd_id hpd);
 
-static struct radeon_asic evergreen_asic = {
-       .init = &evergreen_init,
-       .fini = &evergreen_fini,
-       .suspend = &evergreen_suspend,
-       .resume = &evergreen_resume,
-       .cp_commit = NULL,
-       .gpu_reset = &evergreen_gpu_reset,
-       .vga_set_state = &r600_vga_set_state,
-       .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
-       .gart_set_page = &rs600_gart_set_page,
-       .ring_test = NULL,
-       .ring_ib_execute = NULL,
-       .irq_set = NULL,
-       .irq_process = NULL,
-       .get_vblank_counter = NULL,
-       .fence_ring_emit = NULL,
-       .cs_parse = NULL,
-       .copy_blit = NULL,
-       .copy_dma = NULL,
-       .copy = NULL,
-       .get_engine_clock = &radeon_atom_get_engine_clock,
-       .set_engine_clock = &radeon_atom_set_engine_clock,
-       .get_memory_clock = &radeon_atom_get_memory_clock,
-       .set_memory_clock = &radeon_atom_set_memory_clock,
-       .set_pcie_lanes = NULL,
-       .set_clock_gating = NULL,
-       .set_surface_reg = r600_set_surface_reg,
-       .clear_surface_reg = r600_clear_surface_reg,
-       .bandwidth_update = &evergreen_bandwidth_update,
-       .hpd_init = &evergreen_hpd_init,
-       .hpd_fini = &evergreen_hpd_fini,
-       .hpd_sense = &evergreen_hpd_sense,
-       .hpd_set_polarity = &evergreen_hpd_set_polarity,
-};
+extern struct radeon_asic evergreen_asic;
 
 #endif
-- 
1.7.0


------------------------------------------------------------------------------
Download Intel&#174; Parallel Studio Eval
Try the new software tools for yourself. Speed compiling, find bugs
proactively, and fine-tune applications for parallel performance.
See why Intel Parallel Studio got high marks during beta.
http://p.sf.net/sfu/intel-sw-dev
--
_______________________________________________
Dri-devel mailing list
Dri-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/dri-devel

Reply via email to