On 02/12/14 17:19, H Hartley Sweeten wrote:
The Z8536 CIO registers are indirectly read by writing the register value to the control register then reading the control register. Introduce a helper function to read the Z8536 CIO registers.Signed-off-by: H Hartley Sweeten <hswee...@visionengravers.com> Cc: Ian Abbott <abbo...@mev.co.uk> Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org> --- .../comedi/drivers/addi-data/hwdrv_apci1500.c | 216 +++++---------------- 1 file changed, 52 insertions(+), 164 deletions(-) diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c index bfa9228..5d4d35b 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c @@ -129,6 +129,14 @@ static int i_InputChannel; static int i_TimerCounter1Enabled, i_TimerCounter2Enabled, i_WatchdogCounter3Enabled; +static unsigned int z8536_read(struct comedi_device *dev, unsigned int reg) +{ + struct apci1500_private *devpriv = dev->private; + + outb(reg, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER); + return inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER); +} +
Since this is used by both the interrupt handler and "normal" code, it should use a spin-lock (e.g. dev->spinlock could be used). That also applies to z8536_write() in patch 2 and probably the "reset" sequence at the start of z8536_reset() in patch 3.
-- -=( Ian Abbott @ MEV Ltd. E-mail: <abbo...@mev.co.uk> )=- -=( Web: http://www.mev.co.uk/ )=- _______________________________________________ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
