Add new 'mt7621_pci_base' variable as a pointer to definition
RALINK_PCI_BASE to use it along the code.
Signed-off-by: Sergio Paracuellos <sergio.paracuel...@gmail.com>
---
drivers/staging/mt7621-pci/pci-mt7621.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
b/drivers/staging/mt7621-pci/pci-mt7621.c
index 4f56840..b745423 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -177,6 +177,8 @@ static int pcie_link_status = 0;
#define PCI_ACCESS_WRITE_2 4
#define PCI_ACCESS_WRITE_4 5
+static void __iomem *mt7621_pci_base;
+
static inline u32 mt7621_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
unsigned int func, unsigned int where)
{
@@ -483,6 +485,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
{
unsigned long val = 0;
+ mt7621_pci_base = (void __iomem *)RALINK_PCI_BASE;
iomem_resource.start = 0;
iomem_resource.end = ~0;
ioport_resource.start = 0;
--
2.7.4
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