Kieran Bingham, Tue, Apr 07, 2020 20:44:04 +0200:
> Hi Alex,
> 
> With all the changes you've described below:
> 
> Reviewed-by: Kieran Bingham <kieran.bingham+rene...@ideasonboard.com>
> 

Thanks. Will be in v6 like this below:

diff --git a/drivers/media/i2c/adv748x/adv748x.h 
b/drivers/media/i2c/adv748x/adv748x.h
index 0a9d78c2870b..e1d8cb01ebf8 100644
--- a/drivers/media/i2c/adv748x/adv748x.h
+++ b/drivers/media/i2c/adv748x/adv748x.h
@@ -226,6 +226,16 @@ struct adv748x_state {
 
 #define ADV748X_IO_VID_STD             0x05
 
+#define ADV748X_IO_PAD_CONTROLS                0x0e
+#define ADV748X_IO_PAD_CONTROLS_TRI_LLC        BIT(7)
+#define ADV748X_IO_PAD_CONTROLS_TRI_PIX        BIT(6)
+#define ADV748X_IO_PAD_CONTROLS_TRI_AUD        BIT(5)
+#define ADV748X_IO_PAD_CONTROLS_TRI_SPI        BIT(4)
+#define ADV748X_IO_PAD_CONTROLS_BIT_3  BIT(3)
+#define ADV748X_IO_PAD_CONTROLS_PDN_PIX        BIT(2)
+#define ADV748X_IO_PAD_CONTROLS_PDN_AUD        BIT(1)
+#define ADV748X_IO_PAD_CONTROLS_PDN_SPI        BIT(0)
+
 #define ADV748X_IO_10                  0x10    /* io_reg_10 */
 #define ADV748X_IO_10_CSI4_EN          BIT(7)
 #define ADV748X_IO_10_CSI1_EN          BIT(6)
@@ -248,7 +258,20 @@ struct adv748x_state {
 #define ADV748X_IO_REG_FF              0xff
 #define ADV748X_IO_REG_FF_MAIN_RESET   0xff
 
+/* DPLL Map */
+#define ADV748X_DPLL_MCLK_FS           0xb5
+#define ADV748X_DPLL_MCLK_FS_N_MASK    GENMASK(2, 0)
+
 /* HDMI RX Map */
+#define ADV748X_HDMI_I2S               0x03    /* I2S mode and width */
+#define ADV748X_HDMI_I2SBITWIDTH_MASK  GENMASK(4, 0)
+#define ADV748X_HDMI_I2SOUTMODE_SHIFT  5
+#define ADV748X_HDMI_I2SOUTMODE_MASK  GENMASK(6, ADV748X_HDMI_I2SOUTMODE_SHIFT)
+#define ADV748X_HDMI_I2SOUTMODE_I2S    0
+#define ADV748X_HDMI_I2SOUTMODE_RIGHT_J        1
+#define ADV748X_HDMI_I2SOUTMODE_LEFT_J 2
+#define ADV748X_HDMI_I2SOUTMODE_SPDIF  3
+
 #define ADV748X_HDMI_LW1               0x07    /* line width_1 */
 #define ADV748X_HDMI_LW1_VERT_FILTER   BIT(7)
 #define ADV748X_HDMI_LW1_DE_REGEN      BIT(5)
@@ -260,6 +283,16 @@ struct adv748x_state {
 #define ADV748X_HDMI_F1H1              0x0b    /* field1 height_1 */
 #define ADV748X_HDMI_F1H1_INTERLACED   BIT(5)
 
+#define ADV748X_HDMI_AUDIO_MUTE_SPEED  0x0f
+#define ADV748X_HDMI_AUDIO_MUTE_SPEED_MASK     GENMASK(4, 0)
+#define ADV748X_MAN_AUDIO_DL_BYPASS    BIT(7)
+#define ADV748X_AUDIO_DELAY_LINE_BYPASS        BIT(6)
+
+#define ADV748X_HDMI_MUTE_CTRL         0x1a
+#define ADV748X_HDMI_MUTE_CTRL_MUTE_AUDIO      BIT(4)
+#define ADV748X_HDMI_MUTE_CTRL_WAIT_UNMUTE_MASK        GENMASK(3, 1)
+#define ADV748X_HDMI_MUTE_CTRL_NOT_AUTO_UNMUTE BIT(0)
+
 #define ADV748X_HDMI_HFRONT_PORCH      0x20    /* hsync_front_porch_1 */
 #define ADV748X_HDMI_HFRONT_PORCH_MASK 0x1fff
 
@@ -281,6 +314,9 @@ struct adv748x_state {
 #define ADV748X_HDMI_TMDS_1            0x51    /* hdmi_reg_51 */
 #define ADV748X_HDMI_TMDS_2            0x52    /* hdmi_reg_52 */
 
+#define ADV748X_HDMI_REG_6D            0x6d    /* hdmi_reg_6d */
+#define ADV748X_I2S_TDM_MODE_ENABLE    BIT(7)
+
 /* HDMI RX Repeater Map */
 #define ADV748X_REPEATER_EDID_SZ       0x70    /* primary_edid_size */
 #define ADV748X_REPEATER_EDID_SZ_SHIFT 4
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