On 10/22/12 18:10, Jeff VanDellen wrote:
> 
> On Sat, Oct 20, 2012 at 3:19 PM, Laszlo Ersek <ler...@redhat.com> wrote:

>> I prepared an AutoUnattend.xml file for the DVD root with WAIK. It does
>> get a bit farther (I can tell it from the VCPU load chart, it's very
>> characteristic), but it still stops somewhere waiting for user input. (A
>> problem with the xml I'm sure.)
>>
> 
> I've attempted a similar method. I managed to get my custom WAIK built
> iso to boot properly but as soon as it gets to about 99% in the
> install I get a typical  windows error (0x000..). I've had lots of
> experience with windows unattended xml files in the past, they can be
> very tricky and frustrating to work with.

I struggled with this for quite a few hours but ultimately the
insurmountable obstacle was that I could not specify the ProductKey such
that the installer would not ask for it. I've found
<http://technet.microsoft.com/en-us/library/cc749389%28v=ws.10%29.aspx>
but the second (ie. important) XML element to specify the key in is
simply not available to me in WAIK.


>> Maybe 800x600x24bpp would work... The installer seems to set a 800x600
>> resolution when booting from SeaBIOS.

I also worked out a mode like that (see attached patch -- illustration
only, it's not clean enough for submission). OVMF itself works with it
(clean splash screen, dialogs and early installer boot messages), but
the later installer phases like it even less (even the boot progress bar
is garbled).


> I found the following two virtualbox links which may be of assistance
> with this issue
> 
> https://www.virtualbox.org/ticket/7702

Indeed; the other forum comments I've referenced in this thread before
are also from "d3vi1". I emailed him (ie. Razvan, CC'd) last night, thus
he's now aware of this discussion.

Thanks!
Laszlo
From 8bcf161d27f5c9f0c889a9e8aff042c8646a178d Mon Sep 17 00:00:00 2001
From: Laszlo Ersek <ler...@redhat.com>
Date: Sun, 21 Oct 2012 17:26:06 +0200
Subject: [PATCH] QemuVideoDxe: add 800 x 600 x 24bpp @ 60 Hz

For testing, other modes are disabled.

Contributed-under: TianoCore Contribution Agreement 1.0

Signed-off-by: Laszlo Ersek <ler...@redhat.com>
---
 OvmfPkg/QemuVideoDxe/Initialize.c |   70 +++++++++++++++++++++++++++++++++++++
 1 files changed, 70 insertions(+), 0 deletions(-)

diff --git a/OvmfPkg/QemuVideoDxe/Initialize.c 
b/OvmfPkg/QemuVideoDxe/Initialize.c
index e52e276..0987494 100644
--- a/OvmfPkg/QemuVideoDxe/Initialize.c
+++ b/OvmfPkg/QemuVideoDxe/Initialize.c
@@ -69,6 +69,39 @@ UINT8 Crtc_800_600_256_60[28] = {
   0xFF, 0x00, 0x00, 0x22
 };
 
+UINT8 Crtc_800_600_24bpp_60[28] = {
+  // http://www.osdever.net/FreeVGA/vga/crtcreg.htm#00
+  0x7F, // 0x00: horiz. total: <number of character clocks per scan line> - 5
+  0x63, // 0x01: end horizontal display; start overscan at this character clock
+  0x64, // 0x02: start horizontal blanking
+  0x80, // 0x03: EVRA (forced 1); Disp. Enab. Skew; end horizontal blanking
+  0x6B, // 0x04: start horizontal retrace
+  0x1B, // 0x05: end horizontal retrace (= grab-bag of stuff)
+  0x72, // 0x06: vertical total, lower 8 bits
+  0xF0, // 0x07: grab bag of stuff; vertical total == 0x272 == 626 dec
+  0x00, // 0x08: Preset Row Scan Register
+  0x60, // 0x09: Maximum Scan Line + grab bag of stuff
+  0x00, // 0x0a: Cursor Start
+  0x00, // 0x0b: Cursor End
+  0x00, // 0x0c: Start Address High
+  0x00, // 0x0d: Start Address Low
+  0x00, // 0x0e: Cursor Location High
+  0x00, // 0x0f: Cursor Location Low
+  0x58, // 0x10: Vertical Retrace Start
+  0x8C, // 0x11: Vertical Retrace End
+  0x57, // 0x12: Vertical Display End
+  0x2C, // 0x13: Offset Register <------------ UPDATED TO MATCH BPP
+        //       (((reg[0x1b] & 0x10) << 4) | reg[0x13]) = width * bpp / 64
+  0x00, // 0x14: Underline Location
+  0x5F, // 0x15: Start Vertical Blanking
+  0x91, // 0x16: End Vertical Blanking
+  0xE3, // 0x17: CRTC Mode Control; 11100011
+  0xFF, // 0x18: Line Compare
+  0x00, // 0x19: Interlace End
+  0x00, // 0x1a: Miscellaneous Control --> disables interlace
+  0x32  // 0x1b: Extended Display Control; bit 4 is high bit of Offset Register
+};
+
 UINT8 Crtc_800_600_32bpp_60[28] = {
   0x7F, 0x63, 0x64, 0x80, 0x6B, 0x1B, 0x72, 0xF0,
   0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -81,6 +114,39 @@ UINT16 Seq_800_600_256_60[15] = {
   0x5b0c, 0x450d, 0x510e, 0x2b1b, 0x2f1c, 0x301d, 0x3a1e
 };
 
+UINT16 Seq_800_600_24bpp_60[15] = {
+  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04,
+
+  // index 07: extended sequencer mode; in fact "depth selector"
+  // see "alp_driver.c" in xf86-video-cirrus
+  // 7 6 5 4 3 2 1 0
+  // 0 0 0 1 1 0 0 1 == 0x19 (32bpp)
+  // 0 0 0 1 0 1 0 1 == 0x15 (24bpp)
+  //   ^^^^^       ^
+  //     |         enable hi-res 256 color modes   (bogus)
+  //     (R) Configuration switch 0-2 (MD[14:12])  (bogus)
+  //
+  0x1507,
+
+  0x0008, // Miscellaneous Control
+
+  // Four video clocks, see "CirrusClk.c" in "xf86-video-cirrus" and
+  // VGADOC4B/CIRRUS.TXT. The used clock is selected by
+  // (MiscSetting & 0x0C) >> 2. Apparently we're going to use VCLK3 here
+  // (MiscSetting == 0xEF).
+
+  // VCLK 0-3 numerators
+  0x4a0b, 0x5b0c, 0x450d, 0x510e,
+
+  // VCLK 0-3 denominators
+  0x2b1b, 0x2f1c, 0x301d, 0x3a1e
+
+  // resulting values in Hz for VCLK 0-3:
+  // (14318180 * (numer & 0x7F) / ((denom & 0x3E) >> 1)) >> (denom & 0x01)
+  // in MHz:
+  // 25.227, 28.325, 41.165, 39.992
+};
+
 UINT16 Seq_800_600_32bpp_60[15] = {
   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,
   0x5b0c, 0x450d, 0x510e, 0x2b1b, 0x2f1c, 0x301d, 0x3a1e
@@ -126,6 +192,7 @@ UINT8 Crtc_1024_768_24bpp_60[28] = {
 UINT16 Seq_1024_768_24bpp_60[15] = {
   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1507, 0x0008, 0x4a0b,
   0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e
+  // VCLK3: 64.983 MHz
 };
 
 UINT8 Crtc_1024_768_32bpp_60[28] = {
@@ -144,6 +211,7 @@ UINT16 Seq_1024_768_32bpp_60[15] = {
 /// Table of supported video modes
 ///
 QEMU_VIDEO_VIDEO_MODES  QemuVideoVideoModes[] = {
+#if 0
 //  {  640, 480, 8, 60, Crtc_640_480_256_60,  Seq_640_480_256_60,  0xe3 },
 //  {  800, 600, 8, 60, Crtc_800_600_256_60,  Seq_800_600_256_60,  0xef },
   {  640, 480, 32, 60, Crtc_640_480_32bpp_60,  Seq_640_480_32bpp_60,  0xef },
@@ -152,6 +220,8 @@ QEMU_VIDEO_VIDEO_MODES  QemuVideoVideoModes[] = {
   { 1024, 768, 24, 60, Crtc_1024_768_24bpp_60, Seq_1024_768_24bpp_60, 0xef }
 //  { 1024, 768, 32, 60, Crtc_1024_768_32bpp_60, Seq_1024_768_32bpp_60, 0xef }
 //  { 960, 720, 32, 60, Crtc_960_720_32bpp_60, Seq_1024_768_32bpp_60, 0xef }
+#endif
+  {  800, 600, 24, 60, Crtc_800_600_24bpp_60,  Seq_800_600_24bpp_60,  0xef }
 };
 
 #define QEMU_VIDEO_MODE_COUNT \
-- 
1.7.1

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