> 0x400/0xB000 are I/O ranges, not memory ranges.
I knew that... :^ :D But gdb can't read i/o ports!?
So gdb => qemu: I can single step and get/set cpu regs, but I can't set
breakpoints or step over subroutines... does qemu 1.2 support breakpoints?
(anything to make this easier!)
My additions/observations are in blue (html):
volatile UINT32 xxx = 0;
AcpiTimerLibConstructor (VOID) {
// Check to see if the PIIX4 Power Management Base Address is already
enabled
if ((PciRead8 (PMREGMISC) & PMIOSE) == 0) {
// PMREGMISC = 0xb080, PciRead8 returns 0 so the following is executed
// If the PIIX4 Power Management Base Address is not programmed,
// then program the PIIX4 Power Management Base Address from a PCD.
PciAndThenOr32 (PMBA, (UINT32)(~0x0000FFC0), PcdGet16
(PcdAcpiPmBaseAddress));
// PcdAcpiPmBaseAddress = 0xb040
// Enable PMBA I/O port decodes in PMREGMISC
PciOr8 (PMREGMISC, PMIOSE);
}
xxx = PciRead32(PMBA); // xxx = 0xb001
return RETURN_SUCCESS; // always? no test is possible?
}
I'm not sure I get to read from the PMBA but 0xb001 looks suspicious. (And
I verified that AcpiTimerLibConstructor is called exactly once).
For my edification, Pcd stands for?
And unrelated to this but what might help debugging - Andrei Warkentin's
GdbSyms script gdb_uefi.py is looking for EFI_SYSTEM_TABLE and not finding
it (the actual error is: No type named EFI_SYSTEM_TABLE_POINTER). Have
these structures changed names since 2 years ago when he worked with
students during the GsoC?
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