On Mon, Dec 1, 2008 at 3:56 PM, Joe Subich, W4TV <[EMAIL PROTECTED]> wrote:
>
>> This is not correct.  You can't just compare the number of
>> bits without taking into consideration the ADC sampling rate
>> and signal bandwidth.  Please see the concept of "signal
>> processing gain" or "process gain".
>
> The concept of processing gain is completely different than
> blocking dynamic range.  The maximum large signal capability
> of any DAC has an absolute limit based on the largest integer
> the DAC can resolve and the DAC reference voltage. When more
> than one signal is present within the "window" (DC to maximum
> frequency) of the DAC the DAC needs to be able to handle the
> sum of the instantaneous peak (vector maximum) voltages not
> their average levels.
>
> No amount of decimation and processing will reduce the
> instantaneous peak voltage that the ADC must handle to
> prevent overload.  The clipping (overload) level results
> in distortion (IMD) or imposes an operating condition that
> must be prevented by the application of hardware AGC (gain
> reduction) ahead of the ADC (blocking).  Decimation and
> processing gain are only of value as long as he hardware
> is operating within its linear range.
>
> 73,
>
>   ... Joe, W4TV

I assume you mean ADC above and not DAC...  You are right that if you
exceed the maximum voltage level into the ADC no amount of processing
gain will change this fact.  What the processing gain does give you is
the ability to hear weak signals that are much lower than the 14 or 16
bit ADC without decimation would be capable of hearing.  The weakest
signal that can be resolved plays just as important a part in the
calculation of the blocking dynamic range of a receiver as its strong
signal handling capability - and this is true whether we are talking
about ADCs or analog receivers.

-- 
Phil Covington
Software Radio Laboratory LLC
Columbus, Ohio
http://www.srl-llc.com
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