Hi everybody,
I'm trying to generate the layout of a full adder from a vhdl
description. The full adder is made with two half adders and an or
gate, as usual.
I've already created the layout of the half adder and the or gate, now
i need electric to create the layout of the full adder.
When I select Silicon Compiler -> Convert current cell to layout, the
compiler returns a java exception:
Cannot create arc Metal-1 from (4.0,177.0) to (-20.0,177.0) in cell
'FULL_ADDER{lay}' because it cannot connect to port vdd on node
HALF_ADDER{lay}[node1]
java.lang.NullPointerException
at
com.sun.electric.database.topology.ArcInst.makeInstanceBase(ArcInst.java:
225)
etc.........
What can be the cause of this?
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