Greetings to all members. I am trying to use the Silicon Compiler tool in order to convert a schematic to layout, but i cant figure how it works. The electric manual says very few about that issue. With my scematic i choose tools -> Silicon Compliler -> Convert current cell to layout. After that electric produce a new library called "sclib", full of some layouts gates.
Can you please give me any help about that ? Best regards Chris -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/groups/opt_out.
