Hi Maurine,

On 20 January 2015 at 18:02, Ma, Maurice <[email protected]> wrote:
> Hi, Simon,
>
> Just want to make sure that you are talking about the MinnowBoard 
> (TunnelCreek + TopCliff), not MinnowBoard Max (Baytrail), right?
>
> For MinnowBoard Max,  I have tested and the early serial port does work 
> before the FSP API call.
>
> For MinnowBoard, the serial port is from UART0 on TopCliff(EG20T).   In order 
> to enable early console in coreboot,
> you need to initialize the TopCliff UART 0 and then call console_init() in 
> romstage  after FSP TempRamInit() and before FspInit().
>
> The standard linux UART driver for EG20T is open,   you can refer to :
> http://lxr.free-electrons.com/source/drivers/tty/serial/pch_uart.c
>
> You just need to implement the standard RX and TX function for Coreboot.   It 
> should be straight forward.
> Please note, since the EG20T UART is on PCI bus and the PCI bus is not 
> enumerated yet at early boot stage.   So you need to assign temporary bus and 
> PCI MMIO resource to the bridges and the UART controller before accessing the 
> UART registers.

Yes i it Minnowboard Max. It sounds like you are saying I should get
serial output early in romstage, but I don't. Do I need to enable
something?

Thanks,
Simon

>
> Thanks
> Maurice
>
> -----Original Message-----
> From: Hawley, John
> Sent: Tuesday, January 20, 2015 3:07 PM
> To: MinnowBoard Development and Community Discussion
> Cc: Ma, Maurice
> Subject: Re: [MinnowBoard] Early serial output
>
> Maurice might have an answer on this for you.
>
> Thanks!
>
> - John 'Warthog9' Hawley
>
> On 1/17/2015 7:09 PM, Simon Glass wrote:
>> Hi,
>>
>> I see in coreboot there is code to print UART messages in the
>> romstage, but nothing appears until romstage_main_continue() is
>> called. This is quite late - both the CAR init and FSP init have
>> completed by this point.
>>
>> Is there any way to get earlier serial output? I don't think the board
>> has visible POST codes so serial seems to be the only option.
>>
>> Regards,
>> Simon
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>>
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