Hi Maurice, On 21 January 2015 at 13:18, Simon Glass <[email protected]> wrote: > Hi Maurine, > > On 20 January 2015 at 18:02, Ma, Maurice <[email protected]> wrote: >> Hi, Simon, >> >> Just want to make sure that you are talking about the MinnowBoard >> (TunnelCreek + TopCliff), not MinnowBoard Max (Baytrail), right? >> >> For MinnowBoard Max, I have tested and the early serial port does work >> before the FSP API call. >> >> For MinnowBoard, the serial port is from UART0 on TopCliff(EG20T). In >> order to enable early console in coreboot, >> you need to initialize the TopCliff UART 0 and then call console_init() in >> romstage after FSP TempRamInit() and before FspInit(). >> >> The standard linux UART driver for EG20T is open, you can refer to : >> http://lxr.free-electrons.com/source/drivers/tty/serial/pch_uart.c >> >> You just need to implement the standard RX and TX function for Coreboot. >> It should be straight forward. >> Please note, since the EG20T UART is on PCI bus and the PCI bus is not >> enumerated yet at early boot stage. So you need to assign temporary bus >> and PCI MMIO resource to the bridges and the UART controller before >> accessing the UART registers. > > Yes i it Minnowboard Max. It sounds like you are saying I should get > serial output early in romstage, but I don't. Do I need to enable > something?
Just to follow up, I got this working. It seems there is quite a long list of init to be done to get the serial working. But I have early output running now. Thanks for your help. Regards, Simon [snip] _______________________________________________ elinux-MinnowBoard mailing list [email protected] http://lists.elinux.org/mailman/listinfo/elinux-minnowboard
