On Thu, 28 Apr 2011, Kim Kirwan wrote: > Date: Thu, 28 Apr 2011 18:36:35 -0500 > From: Kim Kirwan <k...@kimkirwan.com> > Reply-To: EMC developers <emc-developers@lists.sourceforge.net> > To: emc-developers@lists.sourceforge.net > Subject: Re: [Emc-developers] [PATCH] Add support for Hostmot2 Buffered SPI > and the Mesa 7i65 > > I have been following this thread with great interest. I presume > the 7i49 (six-input resolver) is similarly affected due to its > use of SPI to the mothercard? Is this so? I have a 7i49 here > if it will help in any way (indirectly) with the 7i65.
No, the 7I49 is not affected by this delay. It does have a SPI interface to its A-D but this interface runs asyncronously to host access cycles (its synchronous to the resolver reference waveform). There is an inherent delay of one cycle of the resolver reference waveform (so 100 usec at 10 KHz) plus the processing delay (about 22 usec for 6 channels currently) To avoid aliasing, The asynchronous sampled nature of the resolver interface is hidden from the host (EMC in this case) by the output position integrator which runs at 256 times the sampling frequency (so the position register is updated at a 2.56 MHz rate at a 10 KHz resolver frequency) > > Also, note that doubling the speed of the servo thread may not > always be available as a solution. I'm working on a unit now > with a "medium" ladder (admittedly on an older PC) where I felt > I should halve the servo thread to keep ClassicLadder happy, at > least for the moment. The jury is still out, and we're upgrading > the PC, at least somewhat. > > Thanks very much, I look forward to hearing more on this. > > Kim > > > On 04/28/2011 05:52 PM, Peter C. Wallace wrote: >> On Thu, 28 Apr 2011, andy pugh wrote: >> >>> Date: Thu, 28 Apr 2011 23:29:26 +0100 >>> From: andy pugh <bodge...@gmail.com> >>> Reply-To: EMC developers <emc-developers@lists.sourceforge.net> >>> To: EMC developers <emc-developers@lists.sourceforge.net> >>> Subject: Re: [Emc-developers] [PATCH] Add support for Hostmot2 Buffered SPI >>> and the Mesa 7i65 >>> >>> On 28 April 2011 23:24, Peter C. Wallace <p...@mesanet.com> wrote: >>> >>>> Yes, you must send to receive with SPI so unless you want to duplicate the >>>> sending (Looking at the 7I43 timing I would think not) you need to reverse >>>> the >>>> normal order of read write (for SPI only). This means that the read data is >>>> always from the last thread invocations write, that is the read data is one >>>> thread time late. This is fine for the 7I65 as the SPI input data is not >>>> motion related. >>> >>> Ah, yes, I had forgotten that. >>> Though I guess if somebody tried to use the analogue inputs to read >>> tacho data to close a velocity loop they might have problems. >> >> Well say you have a 1 KHz servo thread rate. One way of looking at this is >> that on the average, looking at high speed events, you are .5 mS late, If >> your >> data is always an additional 1 mS late you are now an average of 1.5 mS late. >> So bumping up the servo thread rate to 3 KHz gets you back where you started. >> (.5 ms average lateness = .333 mS for one servo period + 166 usec average >> sampling delay) >> >> (3KHz and 7I65 not suggested for 7I43 however) >>> >>> > > ------------------------------------------------------------------------------ > WhatsUp Gold - Download Free Network Management Software > The most intuitive, comprehensive, and cost-effective network > management toolset available today. Delivers lowest initial > acquisition cost and overall TCO of any competing solution. > http://p.sf.net/sfu/whatsupgold-sd > _______________________________________________ > Emc-developers mailing list > Emc-developers@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-developers > Peter Wallace Mesa Electronics (\__/) (='.'=) This is Bunny. Copy and paste bunny into your (")_(") signature to help him gain world domination. ------------------------------------------------------------------------------ WhatsUp Gold - Download Free Network Management Software The most intuitive, comprehensive, and cost-effective network management toolset available today. Delivers lowest initial acquisition cost and overall TCO of any competing solution. http://p.sf.net/sfu/whatsupgold-sd _______________________________________________ Emc-developers mailing list Emc-developers@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-developers
