Hi Everyone,
A happy new year to you all.

Now for my question. I am looking at a unit that has mains and
SELV circuits that is encapsulated (potted). Am I correct in
assuming that creepage and clearance distances on the PCB for a
potted unit become the same as that for distance through
insulation, as when the traces are buried in a multilayer PCB?

Regards

Doug


______________________________________________________________________
Post your free ad now! http://personals.yahoo.ca


This message is from the IEEE Product Safety Engineering Society
emc-pstc discussion list.    Website:  http://www.ieee-pses.org/

To post a message to the list, send your e-mail to emc-p...@ieee.org

Instructions:  http://listserv.ieee.org/listserv/request/user-guide.html

List rules: http://www.ieee-pses.org/listrules.html

For help, send mail to the list administrators:

     Scott Douglas             emcp...@ptcnh.net
     Mike Mcantwell            mcantw...@ieee.org

For policy questions, send mail to:

     Richard Nute:           ri...@ieee.org
     Jim Bacher:             j.bac...@ieee.org

All emc-pstc postings are archived and searchable on the web at:

    http://www.ieeecommunities.org/emc-pstc

Reply via email to