For IEC60065 Appendix N2.1  (informative) specifies a maximum production line 
dielectric trip current  limit of 100mA. This is considered a dielectric 
failure and looked at as the same as breakdown or flashover.

-----Original Message-----
From: Brian Oconnell [mailto:oconne...@tamuracorp.com] 
Sent: Tuesday, June 24, 2014 12:45 PM
To: EMC-PSTC@LISTSERV.IEEE.ORG
Subject: Re: [PSES] UL61010-1 CSDS Proposal for 6.5.2.4

No. Nicht. Aon. It does NOT matter that current flows through the 'filters' and 
other stuff during AC hi-pot and 'trips' the instrument. This is a good thing - 
set limit levels on your test equipment to verify cap values and leakage paths. 
There is no inherent current limit for this test in the affected standards for 
di-electric withstand.

You do control the ramp and current levels in your factory hi-pot? No? Sit in 
the corner.

Brian

-----Original Message-----
From: Brian Oconnell
Sent: Monday, June 23, 2014 5:30 PM
To: EMC-PSTC@LISTSERV.IEEE.ORG
Subject: UL61010-1 CSDS Proposal for 6.5.2.4

This is excerpted from the latest UL61010-1 CSDS Proposal for 6.5.2.4 Impedance 
of PROTECTIVE BONDING of plug-connected equipment:

"It was proposed that all hi-pot tests should be permitted to be performed with 
either ac or dc, particularly because OEM power supplies often fail when tested 
with ac, but pass when tested with dc.
This seems to be because IEC 60601-1 3rd edition, IEC 60950, and IEC 62368-1, 
to which most of these power supplies are tested, permit either ac or dc 
testing. The consensus of ISA 82 is that this change is appropriate. It is also 
recommended that this change be reflected in the US comments on Part 1 by the 
USTAG."

Ok, why are component power supplies failing AC, but passing the equivalent DC 
withstand test levels? If from reactance, just control dv/dt (many standards 
provide a min rate). And what does the protective bond test have to do with the 
test conditions for di-electric withstand? Or am I missing something obvious?

Brian

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