If a common pre-mature failure mode is electrolytics, then design probably has little or no margin or the SMPS is not being used per conditions of acceptability. But can be typical for an EOL failure mode to be leaky and reduced-value electrolytic caps where the bottom-line buyers are allowed to drive the production process. Have seen some designs where cap esr and loss tangent and WV ratings do not meet the actual operating conditions. Decent caps in reasonable designs will last 20 years to a 80% value, less on Klingon battlecruisers.
Increased MTBF from ‘derating’ can be deduced using the SR322 and MH217 stuff that is based on arrhenius equation. But this assumes that all of the component tolerances already have a decent margin for all of the operational parametrics. X and Y caps are typically too small to do much to inrush current. The ‘dc bus’ for a SMPS is commonly the node after the PFC diode. Some designs use large cap values just after the rectifier, but before the PFC, so they can also affect inrush current. Pop quiz - what SMPS single-fault condition has the most power and current and energy? Brian From: Adam Dixon [mailto:lanterna.viri...@gmail.com] Sent: Tuesday, March 21, 2017 10:02 AM To: Brian O'Connell Cc: EMC-PSTC@LISTSERV.IEEE.ORG Subject: Re: [PSES] AC/DC power conversion and system architecture (in-rush limiting, reliability, cabling) Thanks for the details, Brian! I have Pressman's 3rd edition and didn't see any significant discussion of initial transient/charging behaviors, but perhaps haven't read closely enough yet. My experience w/50% FL de-rating has been different but seems related to your comments regarding component temperatures/airflow. One supplier has public qualification data that includes e-cap lifetimes versus load % and ambient temperature and has told me that e-cap stress is their biggest reliability concern. Another supplier has provided predicted reliability at different load %'s (but not demonstrated). I am fairly familiar w/HALT and SR322 (had a reliability engineer role at one time). For the in-rush behavior, I have thought it to be a function of the primary side circuit design (capacitors & current limiters) in the 1ms range. Did you mean AC bus or DC bus charging for the multiple cycles case? I am interested to do a bit more testing of an existing design under different load conditions based on your description. I have disassembled supplies from different suppliers in the past in the 100W to 300W load range in order to compare input/output capacitors and overall designs. On the primary side, all capacitances have been within a 2X range (80uF to 164uF @ 420/450V) and on the output side a 10X range (1000uF to 10000uF and with very different e-cap voltage de-rating from 1.5x to 7x of Vout). For the upstream protection, there are definitely differences in CB performance whether thermal or combined thermal/magnetic. Depending on the installation location, I have seen instances of local supplementary protection (UL1077 CB's) in addition to branch protection, so I am wanting to make sure the whole power distribution system is well understood for a range of system designs/sizes. Thanks again! -Adam On Mon, Mar 20, 2017 at 2:48 PM, Brian O'Connell <oconne...@tamuracorp.com> wrote: From: Adam Dixon [mailto:lanterna.viri...@gmail.com] Sent: Sunday, March 19, 2017 9:59 AM To: EMC-PSTC@LISTSERV.IEEE.ORG Subject: [PSES] AC/DC power conversion and system architecture (in-rush limiting, reliability, cabling) Long post from this weekend's studies.... I have been thinking about power distribution system tradeoffs for large systems where multiple AC/DC power supplies are used. Surveying 5 or 6 suppliers, picking an arbitrary 100W - 200W range for comparison, I see in-rush current specs with a very wide range (14A to 80A) and a bit of variation in the specified voltages. Some like to specify at 200VAC, others at 230VAC -- all are auto-switching universal input, so the datasheet numbers must be scaled to make an equivalent comparison. The first one or two cycles are mostly to fill up the DC bus caps. Some PFC implementations could increase the period of inrush to three to ten cycles. That said, the peak for the inrush current is (at least for my employer’s stuff) is well under 1mSec for one or two cycles. Auto-switch designs are not same as ‘universal’ input. Some auto-switch units will also have another inrush condition during transition from 120V to 230V input. In any case, the inrush number is useless unless for the least favorable normal operating condition, which is typically 230V. Targeting a 50-70% of full load rating for improved reliability seems reasonable from reviewing qualification data, as well as past discussions with two suppliers. That will in some cases increase the number of power supplies in the system based on mounting location, ease of manufacture and cabling for a large physical structure. Voltage drop on the DC output is another parameter that affects power supply location. Reduced FL will not necessarily increase MTBF; and for many SMPS designs, output load does not necessarily affect the peak inrush current, but can affect the period of initial high input current. Input V and source Z are the dominate factors for inrush, but for power supplies that have a de-rating for some operating conditions, the 50% load can be an interesting test condition. I'd appreciate feedback about in-rush current limiting hardware at the system level. I've seen power supply specifications with block diagrams that identify in-rush limiting circuitry which I expect are mostly either NTC's or planar surge resistors. At the system level, it looks like three main options: a hybrid surge resistor/bypass relay module (European suppliers(?)), a softstart controller (targets motor applications) and switched outlet PDU's for data center applications. I think the hybrid module is best for a largely capacitive inputs and these modules' datasheets give a capacitive load rating (1500uF up to 10000uF from what I've seen so far). Network access for the smart switched outlet PDU is probably not an option for the system design. ‘System’ level inrush limiters could cause problems for some edge cases. If input current rise or voltage rise goes non-monotonic, some SMPS designs will not be happy. While NTCs are typical solutions to SMPS inrush limiting, there are obvious problems where input power can be cycled after the unit has reached operating temperature, and for efficiency. The common solution is a relay across the input NTC, so the NTC never stays warm, and less power and less heat. Have seen a few soft-start functions of control ICs that resulted in weird poles and zeros. And some were indeterminate given certain input conditions. So depends on the design and how used Inrush-limited PDUs can be problematic for both EMI problems and safety hazards where the inrush limiting solution is not closely mapped to characteristics of the particular power conversion equipment. There also look to be moderate cost differences by technology type/application. Any good reference material beyond supplier datasheets and application notes? I've done some searching this weekend and have seen one general lighting reference with estimates for rectifier/PFC topologies of being 30-100x of operating current for in-rush, which doesn't mate well with how the circuit breakers are spec'd (10x to 30x for the millisecond range in-rush transient). I've also seen a few data center-oriented papers and quite a few pages/papers for inductive motor in-rush applications which is not what I am considering. The Pressman book on SMPS design is recommended. Many component power supply mfrs have published guides for the end-use equipment designer. There are special considerations for motor power ≥ ½ HP in both the way things are connected per NEC, and for power supply design considerations. Branch circuits typically use CBs for current interrupt, which are less affected by short-interval overloads. Any suppliers of preference worth evaluating for in-rush limiting for a 12-16A operating current application with common AC/DC open/closed frame supplies? Is the 50-70% FL de-rating for improved reliability a common design target? FL ‘de-rating’ has little direct effect on published reliability numbers for a SMPS. The typical and heart-breaking tragedy of pre-mature component power supply death is typically from input surges or inadequate air-flow or constant overload. Other design attributes that jump to the forefront for you? Look for stuff where the mfr’s design process includes HALT and SR322. Thanks for reading the whole way through and giving it some thought! Cheers, Adam - ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to <emc-p...@ieee.org> All emc-pstc postings are archived and searchable on the web at: http://www.ieee-pses.org/emc-pstc.html Attachments are not permitted but the IEEE PSES Online Communities site at http://product-compliance.oc.ieee.org/ can be used for graphics (in well-used formats), large files, etc. Website: http://www.ieee-pses.org/ Instructions: http://www.ieee-pses.org/list.html (including how to unsubscribe) List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas <sdoug...@ieee.org> Mike Cantwell <mcantw...@ieee.org> For policy questions, send mail to: Jim Bacher: <j.bac...@ieee.org> David Heald: <dhe...@gmail.com>
