Ken, Really great series about PCB design for minimal EMC. I have been through all four now, and a lot of good advices and field theory.
I have some follow-up questions soon 😊 Best regards Amund Fra: Ken Wyatt Sendt: 10. februar 2020 17:59 Til: EMC-PSTC@LISTSERV.IEEE.ORG Emne: Re: [PSES] SV: [PSES] PCB layout technique - multilayer Hi Amund/Gert, I agree with Gert’s advice, that all (especially high speed) signal layers need to have an adjacent ground return plane in order to properly capture the electromagnetic wave of the digital signals (which travel in the dielectric space between layers). The one exception, in my view, would be that we need the same adjacent return for power. Here’s my reasoning: 1. With all the digital switching and corresponding transients occurring, power rails (and planes) are also transmission lines. 2. The electromagnetic waves from these power rail transients travel through the dielectric space between the power rail and the nearest metal (adjacent layer). 3. Therefore, to avoid power transient coupling to other signal layers, there must be an adjacent return plane for every power plane (or routed / polygon) power. 4. Making the power and return planes adjacent and close together will also enhance high frequency decoupling. That is, placing a signal layer between power and power return can couple switching transients to that signal layer. I wrote a four-part series on PC board design to minimize EMI that may help. I discuss in more detail how digital signals move in boards, good and bad stack-ups, and partitioning of circuits to avoid coupling. Hope it helps clarify the physics. https://www.edn.com/design-pcbs-for-emi-part-1-how-signals-move/ Cheers, Ken _______________________ I'm here to help you succeed! Feel free to call or email with any questions related to EMC or EMI troubleshooting - at no obligation. I'm always happy to help! Kenneth Wyatt Wyatt Technical Services LLC 56 Aspen Dr. Woodland Park, CO 80863 Phone: (719) 310-5418 <http://www.emc-seminars.com> Web Site | <https://design-4-emc.com> Blog <https://www.edn.com/electronics-blogs/4376432/The-EMC-Blog> The EMC Blog (EDN) <http://www.emc-seminars.com/Newsletter/Newsletter.html> Subscribe to Newsletter <https://www.linkedin.com/in/kennethwyatt/> Connect with me on LinkedIn On Feb 10, 2020, at 2:29 AM, Gert Gremmen <g.grem...@cetest.nl <mailto:g.grem...@cetest.nl> > wrote: It s an extra layer you might allocate to that low frequency signals , analog signals and or extra power supply. On 10-2-2020 10:22, Amund Westin wrote: Thanks Gert I want to read your advices with great attention. Just one immediately follow-up ==>This Misc layer, is it an extra layer for signal routing, as a Sbott3? Mvh Amund Fra: Gert Gremmen Sendt: 10. februar 2020 09:57 Til: Amund Westin <mailto:am...@westin-emission.no> <am...@westin-emission.no>; EMC-PSTC@LISTSERV.IEEE.ORG <mailto:EMC-PSTC@LISTSERV.IEEE.ORG> Emne: Re: [PSES] PCB layout technique - multilayer Just 2 hints of thousands: If you implement 2 ground planes make sure the ground references on top and bottom are related to the closest ground layer . The stack will than be: Stop -- GND --Stop2 -- PWR - Misc - Sbott2 - GND -Sbott ((S=signal)) (basically you route 2 x 3 layer boards critically, and bond them together with a power plane in between.) The signal should not cross the board and be tempted to flow on an opposite ground layer, but will remain always close to the corresponding ground layer. Make sure both ground layers are extremely well coupled together, esp on board edges If you implement SMPS locally give it a local top layer ground area to connect the principal switch elements together. Connect by a dice pattern 5 via to main GND Good luck. Gert Gremmen On 10-2-2020 8:27, Amund Westin wrote: contact to the nearest ground layer, I’m looking for articles about how to do good EMC layout on multilayer PCB. Choice of PCB layer stacking (8 or 10 layers) and basic routing techniques are the issues of most importance right now. Appreciate if you have some experience about good or bad layer stacking. Thanks! Best regards Amund - ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. 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To post a message to the list, send your e-mail to <emc-p...@ieee.org <mailto:emc-p...@ieee.org> > All emc-pstc postings are archived and searchable on the web at: http://www.ieee-pses.org/emc-pstc.html Attachments are not permitted but the IEEE PSES Online Communities site at http://product-compliance.oc.ieee.org/ can be used for graphics (in well-used formats), large files, etc. Website: http://www.ieee-pses.org/ Instructions: http://www.ieee-pses.org/list.html (including how to unsubscribe) <http://www.ieee-pses.org/list.html> List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas <sdoug...@ieee.org <mailto:sdoug...@ieee.org> > Mike Cantwell <mcantw...@ieee.org <mailto:mcantw...@ieee.org> > For policy questions, send mail to: Jim Bacher <j.bac...@ieee.org <mailto:j.bac...@ieee.org> > David Heald <dhe...@gmail.com <mailto:dhe...@gmail.com> > <g_gremmen.vcf> - ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. 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To post a message to the list, send your e-mail to <emc-p...@ieee.org> All emc-pstc postings are archived and searchable on the web at: http://www.ieee-pses.org/emc-pstc.html Attachments are not permitted but the IEEE PSES Online Communities site at http://product-compliance.oc.ieee.org/ can be used for graphics (in well-used formats), large files, etc. Website: http://www.ieee-pses.org/ Instructions: http://www.ieee-pses.org/list.html (including how to unsubscribe) List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas <sdoug...@ieee.org> Mike Cantwell <mcantw...@ieee.org> For policy questions, send mail to: Jim Bacher: <j.bac...@ieee.org> David Heald: <dhe...@gmail.com>