Stuart Stevenson wrote: >Jon Elson, > Your documentation shows the last output is hardwired to the estop >chain. We are using four I/O cards on the G&L. Is there a way to >change that so all four #7 outputs are not used in this manner? We >would like to use them for other things. >thanks >Stuart > > I think I can answer this for Jon.
No. :) The FPGA uses that input to disable PWM/step output, and reset all SSRs off. This is independent of whether EMC2 notices the problem, as it should be for ESTOP. I'm not sure how this will work for you regarding the estop reset. I think you need to set SSR8 on to get the FPGA to try to start up again, so you'd need to hook all four of them to the same HAL signal I think. You'd probably want a similar thing for the estop inputs - you'd AND or OR them together to get a single combined ESTOP input. - Steve ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
