Jon Elson wrote:
> Sebastian Kuzminsky wrote:
>> Yeah something's not right there, 190 us is way too long.
>>
>>
>> Hm, these numbers come from 'halcmd show param hm2_7i43.*.time', which I 
>> thought was in nanoseconds, but looking at hal_lib.c I see that it's in 
>> CPU clock cycles.  Is that intentional?
>>
>> In hal_lib.c's thread_task(), it calls rtapi_get_clocks() instead of 
>> rtapi_get_time().
>>
>> <http://cvs.linuxcnc.org/cvs/emc2/src/hal/hal_lib.c?rev=1.59>
>>
>>
>> Mine's a 2.6 GHz CPU, so 190 cycles is about 74 microseconds.  With the 
>> 50% margin we've been working with that's 3 KHz, which is a little better.
>>
> Ahh, I measure this stuff with a logic analyzer.  But, those 
> numbers seem much more reasonable!  (Darn, thought I had a 
> competitive advantage, he he!)

Just to keep the record straight, that 74 us number is high too - it 
includes 30 or so microseconds of a higher-priority thread sampling all 
the gpios (in addition to the servo thread doing it).  The actual 
frequency, once I figured out how to measure it properly, is right at 5 KHz.


>> Each EPP cycle takes right around 1 us on my test system.
>>
> I can get down to about 800 ns with mo-bo parport, and 640 or so 
> with a PCI parport.

I get quite a bit of jitter on my on-board parport.  Uploading 128 KB of 
firmware goes anywhere from 850 KBps to 1.1 MBps.  Contention on the PCI 
bus maybe?  There's a wifi card and a bunch of other stuff there.

I have a plug-in PCI parport card, but I haven't gotten it to work yet...


-- 
Sebastian Kuzminsky
Cryogenic travel has improved since then...  I woke screaming in a
translucent box.  “There, there,” said the box. “Everything will be all
right. Have some coffee.”  -- Ken Macleod, "Who's afraid of Wolf 359"
<http://outofthiseos.typepad.com/blog/files/KenMacleodWhosAfraidofWolf359.htm>

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