> > 1. I'll work on a better cable. I've got IDC26F connectors and some 
> > spare 26 flat cable and will crimp up something shortly.
> 
> 
> Cable is important
> >
> > 2. Yes. My 7i43 has FPGA XC3S200 (3s200tq144), I think this 
> equates to 
> > 7i43-2, card part# 7I43-U. I've noticed your updates 
> mesanet 7i43.zip 
> > and will re-download and check md5sum's for 200K bitfiles.
> 
> >
> > 3. Fine. Do I use sc7i43w.exe to load USBIOPR8 to FPGA (ram?) and 
> > scm7i43w.exe for firmware SV8S.BIT to serial eeprom? Will hostmot2 
> > still allow for GPIO of un-initialized functions, when 
> booting from eeprom?
> > I'd think hostmot2/hm2_7i43 would init the same regardless of boot 
> > image source (host or eeprom). Only need servo stuff and 
> possibly some 
> > general IO, so SV8 on eeprom would be great.
> 
> Yes thats the EEPROM bootstrap process (via USB. you can do a 
> similar thing via EPP and DOS but I'd like to eliminate the 
> possibility of bad EPP firmware transfer).
> 
> The setup of the HostMot2 config is completely independent of 
> how the firmware is loaded (EEPROM or file-from-host)
> 
> >
> > Additionally, I've made JTAG connectors before for satellite boxes, 
> > what is DB25 to P6 pinout? I realize this is probably all 
> google-able, 
> > since 7i43.pdf lists pin functions. Just curious.
> 
> To work with Xilinx tools you need a Parallel Cable IV or 
> parallel cable III or Xilinx USB cable. The Parallel cable 
> III is just a buffer or 2 at end of the cable and the 
> schematic is available on the web.
> 
> I have a little SMD PCB Parallel cable III clone with some 
> improvements, I can send you a bare PCB if you wish
> 

Peter,

Thanks for additional info. I made up 26 lead ribbon cable with two
IDC26F connectors tonight and did some more testing. 

1. New cable did not make any difference in firmware loading or
communication b/w host PC and 7i43 card.

2. Write eeprom via eepio8-2.bit(DOS) and usbio8-2.bit (USB,win2000)
using both SV8S.BIT and eepio8-2.bit alternately. 

3. In all cases, eepio8-2.bit was successful and card reset with W4=up
W5=down (load from eeprom) the FPGA started and ran continuously. Tested
FPGA operation with rpo.exe and every connection would produce 50504555
and response from test LEDs.  

4. SV8S.BIT didn't respond correctly after writing via EEP or USB to
eeprom. In both cases with W4=up W5=down (load from eeprom), readhmid
0378 would produce "No hm2 found". Additionally, hm2_7i43 produced the
normal "invalid cookie" "-1 invalid parameters" errors.

One exception:
DOS (W4=down W5=down load from epp)
>sc7i43p SV8S.BIT 0378
>readhmid 0378
Responded correctly, listing hm2 config for about 30 sec after epp
loading.

On repeat command: 
>readhmid 0378
"No hm2 found"
It seems that with SV8S.BIT, 200K FPGA is hanging or developing a
"runtime error".

5. So, has anyone got 7i43 200K board working with hostmot2 firmware,
SV8S.BIT or SVST4_4S.BIT?

Thought I'd dig into the xilinx webpack tonight, but wow! version 10.1
is now at 2.2GB download. Grabbed it anyhow. Read thru the cable stuff
and Peter, now I understand what meant by "Parallel Cable IV or parallel
cable III or Xilinx USB cable". Last March I grabbed ISE webpack 9.2,
started installing to debian, got bogged down and never learned about
the "cables". Thanks for the offer on the PCB. I'll try to get the
webpack installed and get back to you.

Keil

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