OK got it done and it fits in XC9572 we have on little CPLD board but I wont
be able to test it until Monday
1. Input digital filter
ok 15 count filter on a,b,index
2. Quadrature decoder (quadrature to up/down)
ok
3. Up down modulo N counter (for divide by N)
ok has 8 selectable DIVIDE_RATIOS via three input signals (jumpers on CPLD bd)
4. 2 bit up/down counter
ok
5. 2 bit binary --> quadrature encoder
ok
6. Optional index stretcher
Works a little strange but should be ok, basically index out is set by
incoming (filtered) index and cleared when DIVIDE_RATIO input encoder counts
have occured (either up or down or a mix) As long as only one edge is used
you will always get a index signal with a minimum width of one (divided) count
>>
>> I even think we have some CPLD bds we never used that I can send over for
>> shipping cost.
>>
Peter Wallace
Mesa Electronics
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