On Wed, 08 Dec 2010 12:15 -0800, "Kirk Wallace"
<kwall...@wallacecompany.com> wrote:

> This is what I have from the last time I played with the above type of
> circuit (sourced by JK?):
> http://www.wallacecompany.com/machine_shop/Shizuoka/watchdog-1b.png 
> 
> It worked on my breadboard but didn't work when I transferred it to a
> PCB. Other things came up and I didn't get back to fixing it.

A few things come to mind looking at that circuit.

1) Using a schmidt input gate (the 74LS14) is good, but I would use a
CMOS input gate like a 74HC14.  That way the loading on the pump can
be ignored, and you can use much larger resistors and smaller caps.

2) The caps seem very large.  When I see microfarads, I think electro-
lytics, which have sloppy tolerances, high leakage current, and are
polarized.  This is the kind of circuit that wants to use film or
ceramic caps.  I would design it with the output cap (C3) as 0.1uF
or maybe 1uF if I had that value laying around in ceramic or film.

3) The pump caps (C1 and C2) should be 10 to 100 times smaller than
the output cap.  You don't want a single pulse on the input to be 
able to transfer a significant amount of charge to the output - it
should take many pulses to charge the output.

4) The time constant of the load resistor (R5) and the output cap
(C3) is what determines how long it will take to drop out after
the input stops pulsing.  It should be much longer than the input
period, but short enough to be safe.  For a 1kHz input, I'd probably
aim for 100mS.  With a 0.1uF output cap, that is a 1 meg R5... hence
the desire for a CMOS input.

5) I worry a bit about the extra stage.  The classic charge pump
circuit has only two diodes and one pump cap.  Imagine the circuit
as drawn, with IC1C and C2 removed, and D3 shorted.  That version
produces an output voltage that is always a little less than the
output swing of IC1F minus two diode drops, which ensures that the
input to IC1A is always lower than it's power supply rail.  The
version shown, with three diodes and two pump caps, can produce
an output that approaches twice the IC1 output swing minus three
diode drops.  That exceeds the input rating of IC1A.  The above
statements are based on CMOS logic, where output swings are nearly
rail-to-rail, and inputs are high impedance.  With the LS family
logic, you probably get a lot less output but the circuit is much
harder to analyze in detail.

> The analog method is probably more practical, but the digital
> solution may be viable too.

Of course there are many ways to solve the problem.

> It may be possible to do this with very few
> components (Vregulator, cap or two, ATtiny2313), at the same cost and
> have more flexibility (wide charge pump frequency range, learning mode,
> different fault responses, complex WD signal).

The parts count may be similar, but the complexity is not.  All of
those features add complexity.  The more complex something is, the
more likely it is to contain un-anticipated failure modes, or just
plain outright bugs.  ANY software or firmware dramatically
increases the complexity.

> I'm still playing with
> it, and for me the programming hurdle is pretty high, so who knows what
> the result might be.
> 
> For someone needing a one-off circuit for a particular machine, the
> analog circuit above is probably the quickest solution. Especially, if
> there were(was?) a widget or cloud app that one could use to calculate
> the part values and model performance (Spice? but that is another
> unfilled time sink).

It isn't that complicated.  A 0.1uF output cap (C3) will work for
the frequencies and delays we are interested in with EMC.  Choose
the output time constant and pick the R5 accordingly: R5 = T / C3.
The pump cap(s) C1 (and C2, if using the two stage design) should
be no more than 1/10 of C3, so 0.01uF (10nF) maximum.  If you make
them too small, you won't get enough output voltage.  I'd probably
start with 1nF, and increase if needed.  The higher the charge pump
frequency in relation to the output time constant, the smaller the
pump caps can be.  If you are pumping at 1kHz and the output time
constant is 100mS, 1nF might be too small.  If pumping at 10kHz,
it should work fine.

I guess in the end it depends on what you are familiar with.  I
can design the analog circuit in a few minutes, build a perfboard
version in 20 minutes, and test it within an hour of starting.
It would take me several times that long to get a microcontroller
development system running to the point of being able to write
and execute even the simplest program.  Other people probably have
the exact opposite situation.

John
-- 
  John Kasunich
  jmkasun...@fastmail.fm


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