On Tue, 3 May 2011, Viesturs L?cis wrote:

> Date: Tue, 3 May 2011 17:08:39 +0300
> From: "[UTF-8] Viesturs L?cis" <viesturs.la...@gmail.com>
> Reply-To: "Enhanced Machine Controller (EMC)"
>     <emc-users@lists.sourceforge.net>
> To: "Enhanced Machine Controller (EMC)" <emc-users@lists.sourceforge.net>
> Subject: Re: [Emc-users] EMC2, 7I43, Hostmot2
> 
> 2011/4/30 Peter C. Wallace <p...@mesanet.com>:
>>
>> 2. Parallel port - 7I43 Cable not right
>>
>
> Yupp, cut off the old 26-pin connector, installed new one, tested with
> multimeter - all the pins were OK, installed the cable and EMC does
> not complain any more!
>
>
> Now I have a question - how do I create 6 stepgens on 7i43 card?
> In INI file I changed the CONFIG line and set NUM_STEPGENS to 6, but
> EMC did not like it - error message told me that 4 is max number.
> So how do I make EMC reconsider?

You need a new bitfile with more stepgens. This requires compiling a new one 
from the firmware source. Theres an existing pinout for a 4 servo axis 
(encoders and PWM gens) on one connector and 12 stepgens on the other 
(SVST4_12) for the 7I43 but I dont think its one of EMCS autobuilt ones

I suspect that a config with 12 stepgens will only fit in the 400K part
Its also pretty easy for me to cobble up a new pinout. If you have a list of 
what you want I can make up an appropriate bitfile.

If you want to do this by yourself, you need the xilinx tools (webpack) and a 
new PINxxxx,vhd file that matches your requirements


>
>
> And how do I get step and dir signals to a particular pin of 7i43 (7i42TA) 
> card?
> For software stepgens there are stepgen.n.step and stepgen.n.dir pins,
> that were "connected" to parport output pins in HAL file.
> But I do not see such pins for hm2_7i43.0.stepgen.0n in HAL
> Configuration, that I would have liked to connect to

The Hostmot2 firmware does not allow re-assigning the pinouts of the special 
function inputs and outputs (encoders, PWM generators, step generators, UARTs 
etc) the pinouts of these inputs and outputs is set when the bitfile is 
compiled.

The GPIO bits can be re-assigned because this re-assignment is done in 
software but for hardware I/O that runs faster than EMC, this is not possible.
(well it is possible in hardware but requires a crossbar switch which would 
use a substantial portion of the FPGA resources, especially if it covered all 
the pins, so it was decided early on the the HostMot2 design to have 
"compiled-in" pinouts)


> hm2_7i43.0.gpio.0nn.out
> What am I missing here?
>
> Viesturs
>
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Peter Wallace
Mesa Electronics

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