On Wed, 28 Aug 2019, John Dammeyer wrote:
Date: Wed, 28 Aug 2019 19:22:09 -0700
From: John Dammeyer <jo...@autoartisans.com>
Reply-To: "Enhanced Machine Controller (EMC)"
<emc-users@lists.sourceforge.net>
To: "'Enhanced Machine Controller (EMC)'" <emc-users@lists.sourceforge.net>
Subject: Re: [Emc-users] MESA 7i92H Saga
Gene,
You've got it backwards. The parallel port version is correct which is why
that line is there.
setp parport.0.pin-07-out-invert 1
remove the above line, or set it false
net zdir => parport.0.pin-07-out
Peter Wallace suggested I do this:
"If you are using LinuxCNC 2.8 you can set the stepgens dir polarity parameter."
Can't find a "dir polarity" parameter here:
http://linuxcnc.org/docs/html/drivers/hostmot2.html#_parameters_3
The names would be similar to
hm2_7i95.0.stepgen.00.direction.invert_output
Note that these are only available in LinuxCNC 2.8 and above
A good way to list all stepgen related pins/parameters/signals is:
halcmd show all *stepgen* :
peter@dc7800:~/linuxcnc/configs$ halcmd show all *stepgen*
Loaded HAL Components:
ID Type Name PID State
Component Pins:
Owner Type Dir Value Name
26 bit IN TRUE hm2_7i95.0.stepgen.00.control-type
26 s32 OUT 0 hm2_7i95.0.stepgen.00.counts
26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_err_at_match
26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_ff_vel
26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_pos_minus_prev_cmd
26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_s_to_match
26 s32 OUT 0 hm2_7i95.0.stepgen.00.dbg_step_rate
26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_vel_error
26 bit IN FALSE hm2_7i95.0.stepgen.00.enable <==
emcmot.00.enable
26 float IN 0 hm2_7i95.0.stepgen.00.position-cmd
26 float OUT 0 hm2_7i95.0.stepgen.00.position-fb ==> fb0
26 float IN 0 hm2_7i95.0.stepgen.00.velocity-cmd <==
motor.00.command
26 float OUT 0 hm2_7i95.0.stepgen.00.velocity-fb
26 bit IN TRUE hm2_7i95.0.stepgen.01.control-type
26 s32 OUT 0 hm2_7i95.0.stepgen.01.counts
26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_err_at_match
26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_ff_vel
26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_pos_minus_prev_cmd
26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_s_to_match
26 s32 OUT 0 hm2_7i95.0.stepgen.01.dbg_step_rate
26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_vel_error
26 bit IN FALSE hm2_7i95.0.stepgen.01.enable <==
emcmot.01.enable
26 float IN 0 hm2_7i95.0.stepgen.01.position-cmd
26 float OUT 0 hm2_7i95.0.stepgen.01.position-fb ==> fb1
26 float IN 0 hm2_7i95.0.stepgen.01.velocity-cmd <==
motor.01.command
26 float OUT 0 hm2_7i95.0.stepgen.01.velocity-fb
26 bit IN TRUE hm2_7i95.0.stepgen.02.control-type
26 s32 OUT 0 hm2_7i95.0.stepgen.02.counts
26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_err_at_match
26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_ff_vel
26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_pos_minus_prev_cmd
26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_s_to_match
26 s32 OUT 0 hm2_7i95.0.stepgen.02.dbg_step_rate
26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_vel_error
26 bit IN FALSE hm2_7i95.0.stepgen.02.enable <==
emcmot.02.enable
26 float IN 0 hm2_7i95.0.stepgen.02.position-cmd
26 float OUT 0 hm2_7i95.0.stepgen.02.position-fb ==> fb2
26 float IN 0 hm2_7i95.0.stepgen.02.velocity-cmd <==
motor.02.command
26 float OUT 0 hm2_7i95.0.stepgen.02.velocity-fb
26 bit IN FALSE hm2_7i95.0.stepgen.03.control-type
26 s32 OUT 0 hm2_7i95.0.stepgen.03.counts
26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_err_at_match
26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_ff_vel
26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_pos_minus_prev_cmd
26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_s_to_match
26 s32 OUT 0 hm2_7i95.0.stepgen.03.dbg_step_rate
26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_vel_error
26 bit IN FALSE hm2_7i95.0.stepgen.03.enable
26 float IN 0 hm2_7i95.0.stepgen.03.position-cmd
26 float OUT 0 hm2_7i95.0.stepgen.03.position-fb
26 float IN 0 hm2_7i95.0.stepgen.03.velocity-cmd
26 float OUT 0 hm2_7i95.0.stepgen.03.velocity-fb
26 s32 IN 1 hm2_7i95.0.stepgen.timer-number
Pin Aliases:
Alias Original Name
Signals:
Type Value Name (linked to)
Parameters:
Owner Type Dir Value Name
26 bit RW FALSE hm2_7i95.0.stepgen.00.direction.invert_output
26 bit RW FALSE hm2_7i95.0.stepgen.00.direction.is_opendrain
26 u32 RW 0x000007D0 hm2_7i95.0.stepgen.00.dirhold
26 u32 RW 0x000007D0 hm2_7i95.0.stepgen.00.dirsetup
26 float RW 240 hm2_7i95.0.stepgen.00.maxaccel
26 float RW 24 hm2_7i95.0.stepgen.00.maxvel
26 float RW 10000 hm2_7i95.0.stepgen.00.position-scale
26 bit RW FALSE hm2_7i95.0.stepgen.00.step.invert_output
26 bit RW FALSE hm2_7i95.0.stepgen.00.step.is_opendrain
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.00.step_type
26 u32 RW 0x000003E8 hm2_7i95.0.stepgen.00.steplen
26 u32 RW 0x000003E8 hm2_7i95.0.stepgen.00.stepspace
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.00.table-data-0
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.00.table-data-1
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.00.table-data-2
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.00.table-data-3
26 bit RW FALSE hm2_7i95.0.stepgen.01.direction.invert_output
26 bit RW FALSE hm2_7i95.0.stepgen.01.direction.is_opendrain
26 u32 RW 0x000007D0 hm2_7i95.0.stepgen.01.dirhold
26 u32 RW 0x000007D0 hm2_7i95.0.stepgen.01.dirsetup
26 float RW 240 hm2_7i95.0.stepgen.01.maxaccel
26 float RW 24 hm2_7i95.0.stepgen.01.maxvel
26 float RW 10000 hm2_7i95.0.stepgen.01.position-scale
26 bit RW FALSE hm2_7i95.0.stepgen.01.step.invert_output
26 bit RW FALSE hm2_7i95.0.stepgen.01.step.is_opendrain
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.01.step_type
26 u32 RW 0x000003E8 hm2_7i95.0.stepgen.01.steplen
26 u32 RW 0x000003E8 hm2_7i95.0.stepgen.01.stepspace
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.01.table-data-0
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.01.table-data-1
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.01.table-data-2
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.01.table-data-3
26 bit RW FALSE hm2_7i95.0.stepgen.02.direction.invert_output
26 bit RW FALSE hm2_7i95.0.stepgen.02.direction.is_opendrain
26 u32 RW 0x000007D0 hm2_7i95.0.stepgen.02.dirhold
26 u32 RW 0x000007D0 hm2_7i95.0.stepgen.02.dirsetup
26 float RW 240 hm2_7i95.0.stepgen.02.maxaccel
26 float RW 24 hm2_7i95.0.stepgen.02.maxvel
26 float RW 10000 hm2_7i95.0.stepgen.02.position-scale
26 bit RW FALSE hm2_7i95.0.stepgen.02.step.invert_output
26 bit RW FALSE hm2_7i95.0.stepgen.02.step.is_opendrain
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.02.step_type
26 u32 RW 0x000003E8 hm2_7i95.0.stepgen.02.steplen
26 u32 RW 0x000003E8 hm2_7i95.0.stepgen.02.stepspace
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.02.table-data-0
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.02.table-data-1
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.02.table-data-2
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.02.table-data-3
26 bit RW FALSE hm2_7i95.0.stepgen.03.direction.invert_output
26 bit RW FALSE hm2_7i95.0.stepgen.03.direction.is_opendrain
26 u32 RW 0x00027FF6 hm2_7i95.0.stepgen.03.dirhold
26 u32 RW 0x00027FF6 hm2_7i95.0.stepgen.03.dirsetup
26 float RW 1 hm2_7i95.0.stepgen.03.maxaccel
26 float RW 0 hm2_7i95.0.stepgen.03.maxvel
26 float RW 1 hm2_7i95.0.stepgen.03.position-scale
26 bit RW FALSE hm2_7i95.0.stepgen.03.step.invert_output
26 bit RW FALSE hm2_7i95.0.stepgen.03.step.is_opendrain
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.03.step_type
26 u32 RW 0x00027FF6 hm2_7i95.0.stepgen.03.steplen
26 u32 RW 0x00027FF6 hm2_7i95.0.stepgen.03.stepspace
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.03.table-data-0
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.03.table-data-1
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.03.table-data-2
26 u32 RW 0x00000000 hm2_7i95.0.stepgen.03.table-data-3
Parameter Aliases:
Alias Original Name
hm2_7i95.0.stepgen.00.direction.invert_output
hm2_7i95.0.gpio.001.invert_output
hm2_7i95.0.stepgen.00.direction.is_opendrain
hm2_7i95.0.gpio.001.is_opendrain
hm2_7i95.0.stepgen.00.step.invert_output
hm2_7i95.0.gpio.000.invert_output
hm2_7i95.0.stepgen.00.step.is_opendrain
hm2_7i95.0.gpio.000.is_opendrain
hm2_7i95.0.stepgen.01.direction.invert_output
hm2_7i95.0.gpio.003.invert_output
hm2_7i95.0.stepgen.01.direction.is_opendrain
hm2_7i95.0.gpio.003.is_opendrain
hm2_7i95.0.stepgen.01.step.invert_output
hm2_7i95.0.gpio.002.invert_output
hm2_7i95.0.stepgen.01.step.is_opendrain
hm2_7i95.0.gpio.002.is_opendrain
hm2_7i95.0.stepgen.02.direction.invert_output
hm2_7i95.0.gpio.005.invert_output
hm2_7i95.0.stepgen.02.direction.is_opendrain
hm2_7i95.0.gpio.005.is_opendrain
hm2_7i95.0.stepgen.02.step.invert_output
hm2_7i95.0.gpio.004.invert_output
hm2_7i95.0.stepgen.02.step.is_opendrain
hm2_7i95.0.gpio.004.is_opendrain
hm2_7i95.0.stepgen.03.direction.invert_output
hm2_7i95.0.gpio.007.invert_output
hm2_7i95.0.stepgen.03.direction.is_opendrain
hm2_7i95.0.gpio.007.is_opendrain
hm2_7i95.0.stepgen.03.step.invert_output
hm2_7i95.0.gpio.006.invert_output
hm2_7i95.0.stepgen.03.step.is_opendrain
hm2_7i95.0.gpio.006.is_opendrain
Exported Functions:
Owner CodeAddr Arg FP Users Name
Realtime Threads:
Period FP Name ( Time, Max-Time )
peter@dc7800:~/linuxcnc/configs$
Peter Wallace
Mesa Electronics
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