On Thursday 22 October 2020 11:07:19 Gene Heskett wrote: > On Thursday 22 October 2020 09:39:35 Peter C. Wallace wrote: > > On Thu, 22 Oct 2020, Gene Heskett wrote: > > > Date: Thu, 22 Oct 2020 04:41:19 -0400 > > > From: Gene Heskett <ghesk...@shentel.net> > > > Reply-To: "Enhanced Machine Controller (EMC)" > > > <emc-users@lists.sourceforge.net> > > > To: emc-users@lists.sourceforge.net > > > Subject: Re: [Emc-users] Now do I have a bad card? > > > > > > On Wednesday 21 October 2020 23:05:16 Peter C. Wallace wrote: > > >> On Wed, 21 Oct 2020, Gene Heskett wrote: > > >>> Date: Wed, 21 Oct 2020 21:06:06 -0400 > > >>> From: Gene Heskett <ghesk...@shentel.net> > > >>> Reply-To: "Enhanced Machine Controller (EMC)" > > >>> <emc-users@lists.sourceforge.net> > > >>> To: emc-users@lists.sourceforge.net > > >>> Subject: Re: [Emc-users] Now do I have a bad card? > > >>> > > >>> On Wednesday 21 October 2020 20:21:30 Peter C. Wallace wrote: > > >>> [...] > > >>> > > >>>>>>>>>> sudo mesaflash --device 5i25 --readhmid > > >>>>>>>>> > > >>>>>>>>> gene@GO704:~/linuxcnc$ sudo mesaflash --device 5i25 > > >>>>>>>>> --readhmid [sudo] password for gene: > > >>>>>>>>> Configuration Name: HOSTMOT2 > > >>>>>>>>> > > >>>>>>>>> General configuration information: > > >>>>>>>>> > > >>>>>>>>> BoardName : MESA5I25 > > >>>>>>>>> FPGA Size: 9 KGates > > >>>>>>>>> FPGA Pins: 144 > > >>>>>>>>> Number of IO Ports: 2 > > >>>>>>>>> Width of one I/O port: 17 > > >>>>>>>>> Clock Low frequency: 33.3333 MHz > > >>>>>>>>> Clock High frequency: 200.0000 MHz > > >>>>>>>>> IDROM Type: 3 > > >>>>>>>>> Instance Stride 0: 4 > > >>>>>>>>> Instance Stride 1: 64 > > >>>>>>>>> Register Stride 0: 256 > > >>>>>>>>> Register Stride 1: 256 > > >>>>>>>>> > > >>>>>>>>> Modules in configuration: > > >>>>>>>>> > > >>>>>>>>> Module: WatchDog > > >>>>>>>>> There are 1 of WatchDog in configuration > > >>>>>>>>> Version: 0 > > >>>>>>>>> Registers: 3 > > >>>>>>>>> BaseAddress: 0C00 > > >>>>>>>>> ClockFrequency: 33.333 MHz > > >>>>>>>>> Register Stride: 256 bytes > > >>>>>>>>> Instance Stride: 4 bytes > > >>>>>>>>> > > >>>>>>>>> Module: IOPort > > >>>>>>>>> There are 2 of IOPort in configuration > > >>>>>>>>> Version: 0 > > >>>>>>>>> Registers: 5 > > >>>>>>>>> BaseAddress: 1000 > > >>>>>>>>> ClockFrequency: 33.333 MHz > > >>>>>>>>> Register Stride: 256 bytes > > >>>>>>>>> Instance Stride: 4 bytes > > >>>>>>>>> > > >>>>>>>>> Module: QCount > > >>>>>>>>> There are 2 of QCount in configuration > > >>>>>>>>> Version: 2 > > >>>>>>>>> Registers: 5 > > >>>>>>>>> BaseAddress: 3000 > > >>>>>>>>> ClockFrequency: 33.333 MHz > > >>>>>>>>> Register Stride: 256 bytes > > >>>>>>>>> Instance Stride: 4 bytes > > >>>>>>>>> > > >>>>>>>>> Module: SSerial > > >>>>>>>>> There are 1 of SSerial in configuration > > >>>>>>>>> Version: 0 > > >>>>>>>>> Registers: 6 > > >>>>>>>>> BaseAddress: 5B00 > > >>>>>>>>> ClockFrequency: 33.333 MHz > > >>>>>>>>> Register Stride: 256 bytes > > >>>>>>>>> Instance Stride: 64 bytes > > >>>>>>>>> > > >>>>>>>>> Module: PWM > > >>>>>>>>> There are 2 of PWM in configuration > > >>>>>>>>> Version: 0 > > >>>>>>>>> Registers: 5 > > >>>>>>>>> BaseAddress: 4100 > > >>>>>>>>> ClockFrequency: 200.000 MHz > > >>>>>>>>> Register Stride: 256 bytes > > >>>>>>>>> Instance Stride: 4 bytes > > >>>>>>>>> > > >>>>>>>>> Module: StepGen > > >>>>>>>>> There are 9 of StepGen in configuration > > >>>>>>>>> Version: 2 > > >>>>>>>>> Registers: 10 > > >>>>>>>>> BaseAddress: 2000 > > >>>>>>>>> ClockFrequency: 33.333 MHz > > >>>>>>>>> Register Stride: 256 bytes > > >>>>>>>>> Instance Stride: 4 bytes > > >>>>>>>>> > > >>>>>>>>> Module: LED > > >>>>>>>>> There are 1 of LED in configuration > > >>>>>>>>> Version: 0 > > >>>>>>>>> Registers: 1 > > >>>>>>>>> BaseAddress: 0200 > > >>>>>>>>> ClockFrequency: 33.333 MHz > > >>>>>>>>> Register Stride: 256 bytes > > >>>>>>>>> Instance Stride: 4 bytes > > >>>>>>>>> > > >>>>>>>>> Configuration pin-out: > > >>>>>>>>> > > >>>>>>>>> IO Connections for P3 > > >>>>>>>>> Pin# I/O Pri. func Sec. func Chan Pin > > >>>>>>>>> func Pin Dir > > >>>>>>>>> > > >>>>>>>>> 1 0 IOPort StepGen 0 > > >>>>>>>>> Dir/Table2 (Out) 14 1 IOPort StepGen > > >>>>>>>>> 0 Step/Table1 (Out) 2 2 IOPort StepGen > > >>>>>>>>> 1 Dir/Table2 (Out) 15 3 IOPort StepGen > > >>>>>>>>> 1 Step/Table1 (Out) 3 4 IOPort StepGen 2 > > >>>>>>>>> Dir/Table2 (Out) 16 5 IOPort StepGen 2 > > >>>>>>>>> Step/Table1 (Out) 4 6 IOPort StepGen 3 > > >>>>>>>>> Dir/Table2 (Out) 17 7 IOPort StepGen 3 > > >>>>>>>>> Step/Table1 (Out) 5 8 IOPort StepGen 4 > > >>>>>>>>> Dir/Table2 (Out) 6 9 IOPort StepGen 4 > > >>>>>>>>> Step/Table1 (Out) 7 10 IOPort SSerial 0 > > >>>>>>>>> TXData1 (Out) 8 11 IOPort SSerial 0 > > >>>>>>>>> RXData1 (In) 9 12 IOPort SSerial 0 > > >>>>>>>>> TXData2 (Out) 10 13 IOPort SSerial 0 > > >>>>>>>>> RXData2 (In) 11 14 IOPort QCount 0 > > >>>>>>>>> Quad-IDX (In) 12 15 IOPort QCount 0 > > >>>>>>>>> Quad-B (In) 13 16 IOPort QCount 0 > > >>>>>>>>> Quad-A (In) > > >>>>>>>>> > > >>>>>>>>> IO Connections for P2 > > >>>>>>>>> Pin# I/O Pri. func Sec. func Chan Pin > > >>>>>>>>> func Pin Dir > > >>>>>>>>> > > >>>>>>>>> 1 17 IOPort StepGen 5 > > >>>>>>>>> Dir/Table2 (Out) 14 18 IOPort StepGen > > >>>>>>>>> 5 Step/Table1 (Out) 2 19 IOPort StepGen > > >>>>>>>>> 6 Dir/Table2 (Out) 15 20 IOPort StepGen > > >>>>>>>>> 6 Step/Table1 (Out) 3 21 IOPort StepGen 7 > > >>>>>>>>> Dir/Table2 (Out) 16 22 IOPort StepGen 7 > > >>>>>>>>> Step/Table1 (Out) 4 23 IOPort StepGen 8 > > >>>>>>>>> Dir/Table2 (Out) 17 24 IOPort StepGen 8 > > >>>>>>>>> Step/Table1 (Out) 5 25 IOPort PWM 0 PWM > > >>>>>>>>> (Out) 6 26 IOPort PWM 0 > > >>>>>>>>> /Enable (Out) 7 27 IOPort PWM 0 > > >>>>>>>>> Dir (Out) 8 28 IOPort SSerial 0 TXData3 > > >>>>>>>>> (Out) 9 29 IOPort SSerial 0 TXEn3 > > >>>>>>>>> (Out) 10 30 IOPort SSerial 0 > > >>>>>>>>> RXData3 (In) 11 31 IOPort QCount > > >>>>>>>>> 1 Quad-IDX (In) 12 32 IOPort QCount 1 > > >>>>>>>>> Quad-B (In) 13 33 IOPort QCount 1 > > >>>>>>>>> Quad-A (In) > > >>>>>>>>> > > >>>>>>>>> gene@GO704:~/linuxcnc$ > > >>>>>>>> > > >>>>>>>> Yep that looks like a 7I76+7I78 configuration > > >>>>>>>> with just one PWMGen for the 7I78 on P2 > > >>>>>>> > > >>>>>>> but this is the load line that generated that dmesg: > > >>>>>>> loadrt hm2_pci config="num_encoders=2 num_pwmgens=2 > > >>>>>>> num_stepgens=3" > > >>>>>> > > >>>>>> Thats a pinout file not a dmesg log > > >>>>> > > >>>>> Its the output of the --readhmid command you asked for. I just > > >>>>> copy pasted it all, including the mesaflash command you can > > >>>>> see at the top of the paste. > > >>>>> > > >>>>> the dmesg file shows the 2nd pwmgen, but the dir signal is > > >>>>> permanently grounded. > > >>> > > >>> Thats with the original 5i25_7i76_1px2d.bit file installed. > > >>> > > >>>> Um no, there is only PWM 0 brought out > > >>>> What pin is grounded? > > >>> > > >>> P2-05. With the 5i25_7i76_1px2d.bit bitfile installed, 3 5i25's > > >>> tested. > > >> > > >> Thats expected to be low since its PWM 0 PWM pin > > > > > > Not according to the docs or dmesg, pwm is pin 6 and is the pwm > > > waveform on the scope, pin 5 is supposed to be its dir, and high > > > for a - input. Its stuck on ground regardless of the polarity of > > > pwmgen's input. As of testing yesterday on 3 different 5i25 cards. > > > > OK I though you were still using the 7I76_7I78 config sorry > > The pin file seemed to indicate I could make it work, but failed. > > > > To demo, I just rewrote the 5i25_7i76_1px2d.bit file back into the > > > card, verified it, and reloaded it. Ran linuxcnc -l with this > > > loadrt line: > > > > > > loadrt hm2_pci config="num_encoders=2 num_pwmgens=2 > > > num_stepgens=3" > > > > > > then ran dmesg and got this: > > > hm2: loading Mesa HostMot2 driver version 0.15 > > > hm2_pci: loading Mesa AnyIO HostMot2 driver version 0.7 > > > hm2_pci: discovered 5i25 at 0000:04:00.0 > > > hm2/hm2_5i25.0: Low Level init 0.15 > > > hm2/hm2_5i25.0: Smart Serial Firmware Version 43 > > > Board hm2_5i25.0.7i76.0.0 Hardware Mode 0 = standard > > > Board hm2_5i25.0.7i76.0.0 Software Mode 0 = io_spin > > > Board hm2_5i25.0.7i76.0.0 Software Mode 1 = io_ana_spin > > > Board hm2_5i25.0.7i76.0.0 Software Mode 2 = io_enc_ana_spin_fv > > > hm2/hm2_5i25.0: 34 I/O Pins used: > > > hm2/hm2_5i25.0: IO Pin 000 (P3-01): StepGen #0, pin Direction > > > (Output) hm2/hm2_5i25.0: IO Pin 001 (P3-14): StepGen #0, pin Step > > > (Output) hm2/hm2_5i25.0: IO Pin 002 (P3-02): StepGen #1, pin > > > Direction (Output) hm2/hm2_5i25.0: IO Pin 003 (P3-15): StepGen > > > #1, pin Step (Output) hm2/hm2_5i25.0: IO Pin 004 (P3-03): StepGen > > > #2, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 005 (P3-16): > > > StepGen #2, pin Step (Output) hm2/hm2_5i25.0: IO Pin 006 (P3-04): > > > IOPort hm2/hm2_5i25.0: IO Pin 007 (P3-17): IOPort > > > hm2/hm2_5i25.0: IO Pin 008 (P3-05): PWMGen #0, pin Out1 (Dir or > > > Down) (Output) hm2/hm2_5i25.0: IO Pin 009 (P3-06): PWMGen #0, pin > > > Out0 (PWM or Up) (Output) hm2/hm2_5i25.0: IO Pin 010 (P3-07): > > > Smart Serial Interface #0, pin tx0 (Output) hm2/hm2_5i25.0: IO > > > Pin 011 (P3-08): Smart Serial Interface #0, pin rx0 (Input) > > > hm2/hm2_5i25.0: IO Pin 012 (P3-09): IOPort > > > hm2/hm2_5i25.0: IO Pin 013 (P3-10): IOPort > > > hm2/hm2_5i25.0: IO Pin 014 (P3-11): Encoder #0, pin Index (Input) > > > hm2/hm2_5i25.0: IO Pin 015 (P3-12): Encoder #0, pin B (Input) > > > hm2/hm2_5i25.0: IO Pin 016 (P3-13): Encoder #0, pin A (Input) > > > hm2/hm2_5i25.0: IO Pin 017 (P2-01): IOPort > > > hm2/hm2_5i25.0: IO Pin 018 (P2-14): IOPort > > > hm2/hm2_5i25.0: IO Pin 019 (P2-02): IOPort > > > hm2/hm2_5i25.0: IO Pin 020 (P2-15): IOPort > > > hm2/hm2_5i25.0: IO Pin 021 (P2-03): IOPort > > > hm2/hm2_5i25.0: IO Pin 022 (P2-16): IOPort > > > hm2/hm2_5i25.0: IO Pin 023 (P2-04): IOPort > > > hm2/hm2_5i25.0: IO Pin 024 (P2-17): IOPort > > > hm2/hm2_5i25.0: IO Pin 025 (P2-05): PWMGen #1, pin Out1 (Dir or > > > Down) (Output) hm2/hm2_5i25.0: IO Pin 026 (P2-06): PWMGen #1, pin > > > Out0 (PWM or Up) (Output) hm2/hm2_5i25.0: IO Pin 027 (P2-07): > > > IOPort > > > hm2/hm2_5i25.0: IO Pin 028 (P2-08): IOPort > > > hm2/hm2_5i25.0: IO Pin 029 (P2-09): IOPort > > > hm2/hm2_5i25.0: IO Pin 030 (P2-10): IOPort > > > hm2/hm2_5i25.0: IO Pin 031 (P2-11): Encoder #1, pin Index (Input) > > > hm2/hm2_5i25.0: IO Pin 032 (P2-12): Encoder #1, pin B (Input) > > > hm2/hm2_5i25.0: IO Pin 033 (P2-13): Encoder #1, pin A (Input) > > > hm2/hm2_5i25.0: registered > > > hm2_5i25.0: initialized AnyIO board at 0000:04:00.0 > > > > > > All I want and need is for both of the 2 pwmgen's I can see above > > > to actually work. In my original .hal file, I had to parallel both > > > pwmgens to get enough signals to run the spindle. > > > > > > But now I need both pwmgen's to be independent and fully > > > functional. > > > > > > pwmgen #1 dir on p2-05 doesn't work, welded to ground. In fact > > > neither DIR can be seen to be working on a halmeter. But at 4AM > > > I'm not going out in my fruits to check it with a scope. > > > > If thats the case there is a configuration error or hardware problem > > There is no reason the direction signals should not work > > > > Have you set the PWM mode correctly and tried setting the PWM value > > by hand? > > To make static testing easier, I have ff0=1 on both, have not set a > type on pwmgen.00 I assumed the default was one, but lemme > check.pwmgen.00 is 1, as is pwmgen.01 right now. I can't check outputs > with halmeter, that takes a real meter or a real scope. But with those > presets in FF1 of both pid's, I can get an offset with the keyboard or > mouse. Visible at the chosen pwmgen.xx.value. But I'll have to scope > it to see if either dir is working. Thats about 2 hours away as I > haven't had breakfast yet. And I'm alone now, so all that is up to > me. > > > > I can probably dummy up something in hal to replace it, and I need > > > this machine running to make the rest of the BS-1 motor kit so > > > I'll try as I've got gpio to spare on p2 yet. But if stepgen4 is > > > removed, which I'll not need, then there s/b room to make both > > > pwmgen's work. > > > > Stepgen 4 on P3 is already removed (its replaced by PWMGen 0) > > > > > That would turn 5i25_7i76_1px2d.bit into 5i25_7i76_2px2d.bit by > > > your naming convention. And that would still leave enough > > > stepgens to run my 6040 mill with that same 2px2d bitfile. So in > > > the very helpfull category, would be a .pin file for every .bit > > > file. :) But there is not. > > > > > > Can that bit file mod be done? Take out stepgen #4, and make both > > > pwmgen's work? With pwmgen.00 outputs on the 7i76D tb3 in place > > > of stepgen#4, and pwmgen.01 working on the advertised pins of p2, > > > I'd be a happy camper. > > > > > > The alternative would appear to be a 7i90 ($59) and 3 7i42TA's > > > ($135) plus a bunch of cable connectors for 50 pin ribbon per > > > parport socket since no one has made an actually working spi > > > interface for wintel stuff. That works great on a rpi4 in SPI > > > mode. But thats over $200 too. UNK how well it would work on a > > > parport with 4 feet of input cable. Its spi cable is only 2" > > > including bus adaptor on the pi's. > > > > > >>>>>> It does seem to have a harmless inconsistency > > >>>>>> (2 PWMgen inside but only 1 wired to the output) > > Its not harmless, its a showstopper. One that I have enough gpio's on > p2 to fix with a couple of comp's if I can get all the edits right. > > Thats something I have yet to verify I can make work. I already have > the last 4 set for is_output but something is still stuck. > > Unless you can fix that bitfile and wire it up. > > Thank you Peter.
My next attempt seems to have arrived at a usable config although neither the spindle nor axisA is wired up ATM. But I am getting the desired signals to make it work from the stepgen 3 terminals on tb2, getting the complements pairs out on the 4 terminals labeled as stepgen 3. I will need to go thru the hal file, removing whats no longer used, but I need to make up an interface for the olimex card next, which needs 8 signals, 3 from liuxcnc, pdm and dir+, dir-, which I now have and can actually see with a halmeter. The spindles pdm is on the 2nd pwmgen with the pwd from the bob. And I need to hook the spindle dir back up on stepgen#3 and the A dirs to the olimex stamp on the other stepgen#3 pins on the 7i76D. I think that might be Progress! Spose? Time to rest my back. Getting old is unavoidable unless you die Junge. Considering the alternative, I rather like it. ;p) This olimex card has so low an R for the on gates that it doesn't even come with a heat sink for a 30 amp rated load, the whole card is about the size of an airmail stamp. If I think it needs cooling, I'll mount it in the psu's exhaust port air stream. Or I've some bigger heat sink stock. Thank you Peter. Cheers, Gene Heskett -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) If we desire respect for the law, we must first make the law respectable. - Louis D. Brandeis Genes Web page <http://geneslinuxbox.net:6309/gene> _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
