Lyle, Speaking for all us newbie's, thanks for the FPGA overview and run down on resources. Looks like we have a lot of reading/research to do to learn about the FPGAs and related hardware and software.
As you mentioned my background was also in discrete TTL logic hardware designs and I can see a different mindset is required for today's devices. Looks like a lot of work, but what fun. 73, Steve - K5FR -----Original Message----- From: Lyle Johnson [mailto:[EMAIL PROTECTED] Sent: Friday, December 02, 2005 11:14 AM To: Steve Nance Cc: 'richard allen'; flexradio@flex-radio.biz Subject: Re: [Flexradio] Xylo Update > This seems to be the main site for the Xylo > http://www.fpga4fun.com/board_Xylo.html. I'm looking for other info > and related hardware, but am just getting started myself and about the > same shape as you. There is enough information there to tell you the main parts on the board. You then should go to the manufacturer's website and download the data sheets and related materials regarding the specific part (the FPGA, for example) as well as the related information (Cyclone family manuals and app notes, the Quartus software and manuals, etc.). Work though any tutorials or examples you find on the software. Quartus is a very powerful tool, but it isn't just "push button" software. In the en d, if you are doing anything other than downloading and using the work someone else did, you will have to spend some time learning the tool. The same thing applies to the Cypress USB interface microcontroller. When learning to work with FPGAs, there are a number of general things to be aware of. If your background is using discrete logic chips, like 7400 or 4000 series (yes, that dates you as well as me) you'll quickly discover that different approaches are required. FPGAs typically have very limited "global clock" resources and logic should usually be designed to be synchronous to the the clocks. Asynchronous logic approaches can work, but they are much more difficult. You can't stick a capacitor or an RC network to suppress a 2 nsec wide glitch, for example, and the FPGA internal logic is fast enough to care about that glitch. With the limited clocking, it is much harder to have various counters and shift registers working at different clock rates; you have to build clock qualification circuits to enable effective division. If you dealt with early C compilers, you recall that you often had to examine the assembly language output and look for errors, optimizations that deleted code you really needed to run, and so forth. The FPGA equivalent is to do a syntax check and correct any errors there, then run a simulation of the input (if using VHDL or Verilog) to ensure the logic design seems to be OK. You then compile it, and then run the simulation on the output of the compiler, because it will sometimes (usually?) infer things from your statements that you did not intend. After place and route, you back-annotate and simulate again. Then you download into the logic, and see if it works! Then you try and understand why it didn't!!! Also, note that different FPGAs from different manufacturers have different resources. Sometimes there are preferred ways to write the VHDL or Verilog to perform a specific type of function. Pay attention to any tips or hints or coding style information particular to the FPGA and compiler you are using. Just like writing lean software versus bloatware, you can write a logic function in different ways and the difference in results can be *huge*. Sort of like nested if-then-else versus a case statement. Sometimes one is better than the other based on the underlying architecture. For debugging any but the most trivial designs, a logic analyzer is almost indispensable. Quartus allows you to embed one in your design, called SignalTap, if you are willing to let Quartus report back to Altera what sort of designs you are doing and all sorts of other "statistics." If you find this intrusive, you have the option to turn off SignalTap. I am nor sure if the Xylo USB interface supports SignalTap back to Quartus or not. Otherwise, you have to write your own logic analyze rand insert it into the design, bringing signals out to pins you can probe with external test equipment. Or maybe your logic design is already pushing the limits of the FPGA and there is no room inside for SignalTap or your own logic analyzer module. I recently purchased a low cost logic analyzer to supplement my higher end analyzer, and find it useful for FPGA projects. YMMV, no financial interest, etc. <http://www.pctestinstruments.com/> FPGAs are powerful, and flexible. They are the hardware equivalent of a CPU. And like a CPU, learning to tame them, feed them, and train them to do what you want is an experience that can be exhilarating as well as extremely frustrating. Persevere! 73, Lyle KK7P
